Supermicro SuperServer 8048B-TRFT, Руководство пользователя

Страница: 68 / 84

Chapter 7: BIOS
7-31 7-30
SUPERSERVER 8048B-TRFT USER'S MANUAL
SLIT (System Locality Information Table) One Hop Value
Select Enable for the BIOS to build the SLIT table to show the differences be-
tween the remote latency ratio and the local latency ratio to further optimize sys-
tem performance for Linux Kernel 2.6 or later platforms. The default setting is
21 .
Memory Interleaving
Use this feature to set the DIMM memory interleaving mood. The options are
NUMA (1-way) Node Interleave, 2-way Node Interleave, 4-way Interleave, 8 Way
Interleaving, Inter-socket, and
Auto .
Socket Interleave Below 4GB
Select Enabled for the memory above the 4G Address space to be split between
two sockets. The options are Enable and
Disable .
Channel Interleaving
Use this feature to set the DIMM channel interleaving mood. The options are
Auto , 1 Way Interleave, 2 Way Interleave, 3, Way Interleave, and 4 Way Inter-
leave.
Rank Interleaving
Use this feature to select a rank memory interleaving method. The options are
Auto , 1 Way, 2 Way, 4, Way, and 8 Way.
DRAM Maintenance
Select Auto for the BIOS to automatically configure DRAM Refreshing and Patrol
settings. The options are Manual and Auto .
pTRR (Pseudo Target Row Refresh) Support
Select Enabled for Pseudo TRR support which will allow the BIOS to assign
an invalid address to a questionable memory module to prevent this memory
module from being accessed by other components. The options are
Enabled
and Disabled.
Injection Probability
AMEI (Asynchroous MCA Error Injection) (AMEI) is a error-handling mechanism
that allows the BIOS to report the MCA errors to the CPU core or the CPU before
resuming normal operations. This item is used to set the threshold of the AMEI
events beyond which the BIOS will report the error events before resuming
operations. The options are 512, 1024, 1365, 1638, 1820, 1928, 2048, 2731,
3277, 3641,
4096 , 5461, 6554, 8192, 10923, 16384, 32768.
Demand Scrub
Demand Scrubbing is a process that allows the CPU to correct correctable
memory errors found on a memory module. When the CPU or I/O issues a
demand-read command, and the read data from memory turns out to be a
correctable error, the error is corrected and sent to the requestor (the original
source). Memory is updated as well. Select Enable to use Demand Scrubbing
for ECC memory correction. The options are
Enable and Disable.
Device Tagging
Select Enable to support device tagging. The options are Disable and Enable.
Memory Power Management
Select Enabled for memory power management support. The options are Dis-
abled and Enabled.
Memory Rank Mask
Select Enabled to support memory rank in the memory controller. The options
are
Disabled and Enabled.
A7 Mode
Select Enabled to support A7 (Addressing) Mode to improve memory perfor-
mance. The options are
Disable and Enable.
DDDC Support
Select Enabled to enable Double-Device Data Correction (DDDC) support for
the error-correction codes to correct memory errors caused by two failed DRAM
devices. The options are
Disable and Enable.
DDDC Wirekill (Wire-Kill)
Select Enabled for Double-Device Data Correction (DDDC) Wire-kill support
which will disable the wire connection between two DRAM devices when they
fail. The options are
Disable and Enable.
DDDC Wirekill (Wire-Kill) Threshold
Use this feature to set the DDDC Wirekill threshold. When the memory errors
reach the threshold,wire-connections between the failed DRAM modules will be
disconnected. The options are
Disable and Enable.
Apply Memory RAS (Reliability-Availability-Serviceability Policy Globally
When this item is set to Enabled, the configuration settings for memory sparing,
Mirroring, DDDC, Device-Tagging will be applied to all nodes in the system. The
options are
Disable and Enable.