Chapter 7: BIOS
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SUPERSERVER 8048B-TRFT USER'S MANUAL
and "Lock Chipset" for Virtualization media support. The default setting is
Enable
.
(Refer to Intel and Microsoft websites for more information.)
VMX
Select Enable for CPU-related Virtualization support. This feature is used in conjunc-
tion with the items: "Clear MCA," "Enable SMX," and "Lock Chipset" for Virtualization
media support. The options are
Enable
and Disable.
Enable SMX
Select Enable for Safer Mode Extensions (SMX) support to enhance data security
in the processor. This feature is used in conjunction with the items: "Clear MCA,"
"VMX," and "Lock Chipset" for Virtualization media support. The options are En-
able and
Disable
.
Lock Chipset
Select Enable to lock chipset register tables and set the register tables to "read-only"
to prevent new data being written into the processor to ensure system security. This
feature is used in conjunction with the items: "Clear MCA," "VMX," and "Enable
SMX" for Virtualization media support. The options are
Enable
and
Disable.
BIST Selection
Select Enable to configure Built-In_Self_Test (BIST) settings, which will allow the
system to perform BIST testing on the processors at bootup. The options are En-
able and
Disable
.
Hardware Prefetcher (Available when supported by the CPU)
If set to Enable, the hardware prefetcher will prefetch streams of data and instruc-
tions from the main memory to the L2 cache to improve CPU performance. The
options are Disable and
Enable
.
Adjacent Cache Line Prefetch (Available when supported by the CPU)
Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised.
Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options
are Disable and
Enable
.
Note
: Please reboot the system for changes on this setting to take effect.
Please refer to Intel’s web site for detailed information.
DCU (Data Cache Unit) Streamer Prefetcher (Available when supported by
the CPU)
If set to Enable, the DCU Streamer Prefetcher will prefetch data streams from the
cache memory to the DCU (Data Cache Unit) to speed up data accessing and pro-
cessing for CPU performance enhancement. The options are Disable and
Enable
.
•
Microcode Revision
•
L1 Cache RAM
•
L2 Cache RAM
•
L3 Cache RAM
•
Processor 0 Version
•
Processor 1 Version
•
Processor 2 Version
•
Processor 3 Version
Clock Spread Spectrum
Select Enable to allow the BIOS to monitor and attempt to reduce the level of
Electromagnetic Interference caused by the components whenever needed. The
options are
Disable
and Enable.
Hyper-Threading
Select Enable to support Intel's Hyper-threading Technology to enhance CPU per-
formance. The options are
Enable
and Disable.
Performance/Watt
Select Power Optimized to enable Intel® Turbo Boost Technology support when
the Power Performance State P0 has lasted more than two seconds. The options
are
Traditional
and Power Optimized.
Clear MCA (Available if supported by the OS & the CPU)
Select Yes to enable Machine-Check Architecture (MCA) support for CPU error
logging. This feature is used in conjunction with the items below: "Execute Disable
Bit," "VMS," "Enable SMX," and "Lock Chipset" for Virtualization media support.
The default setting is
No.
Execute-Disable Bit (Available if supported by the OS & the CPU)
Select Enable for Execute Disable Bit Technology support, which will allow the
processor to designate areas in the system memory where an application code can
execute and where it cannot, thus preventing a worm or a virus from flooding illegal
codes to overwhelm the processor or damage the system during an attack. This
feature is used in conjunction with the items: "Clear MCA," "VMX," "Enable SMX,"
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