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Appendix C
Memory Areas
576
Word(s)
Page
Read/
write
Function
Bit(s)
SR 244
00 to 15
Interrupt Input 00003 Counter Mode PV
Counter PV when interrupt input 00003 is used in counter mode (4 digits hex-
adecimal).
Read-
only
75
SR 245
00 to 15
Interrupt Input 00004 Counter Mode PV
Counter PV when interrupt input 00004 is used in counter mode (4 digits hex-
adecimal).
SR 246
00 to 15
Interrupt Input 00005 Counter Mode PV
Counter PV when interrupt input 00005 is used in counter mode (4 digits hex-
adecimal).
SR 247
00 to 15
Interrupt Input 00006 Counter Mode PV
Counter PV when interrupt input 00006 is used in counter mode (4 digits hex-
adecimal).
(Input 00006 does not exist in CPM2C CPU Units with 10 I/O points.)
SR 248,
SR 249
00 to 15
High-speed Counter PV Area
(Can be used as work bits when the high-speed counter is not used.)
60
SR 250
00 to 15
Analog Setting 0 (CPM2A PCs only)
Used to store the 4-digit BCD set value (0000 to 0200) from analog control 0.
150
SR 251
00 to 15
Analog Setting 1 (CPM2A PCs only)
Used to store the 4-digit BCD set value (0000 to 0200) from analog control 1.
SR 252
00
High-speed Counter Reset Bit
Read/
write
51
01 to 03
Not used.
04
Pulse Output 0 PV Reset Bit
Turn ON to clear the PV of pulse output 0.
Read/
write
97
05
Pulse Output 1 PV Reset Bit
Turn ON to clear the PV of pulse output 1.
e
06, 07
Not used.
08
Peripheral Port Reset Bit
Turn ON to reset the peripheral port. Automatically turns OFF when reset is
complete.
Read/
write
---
09
RS-232C Port Reset Bit
Turn ON to reset the RS-232C port. Automatically turns OFF when reset is
complete.
---
10
PC Setup Reset Bit
Turn ON to initialize PC Setup (DM 6600 through DM 6655). Automatically
turns OFF again when reset is complete. Only effective if the PC is in PRO-
GRAM mode.
2
11
Forced Status Hold Bit
(See note.)
OFF: The forced status of bits that are forced set/reset is cleared when
switching between PROGRAM mode and MONITOR mode.
ON: The status of bits that are forced set/reset are maintained when switch-
ing between PROGRAM mode and MONITOR mode.
The PC Setup can be set to maintain the status of this bit when the PC is
turned off.
17
12
I/O Hold Bit
(See note.)
OFF: IR and LR bits are reset when starting or stopping operation.
ON: IR and LR bit status is maintained when starting or stopping operation.
The PC Setup can be set to maintain the status of this bit when the PC is
turned off.
17
13
Not used.
14
Error Log Reset Bit
Turn ON to clear error log. Automatically turns OFF again when operation is
complete.
Read/
write
555
15
Not used.
Содержание SRM1 - PROGRAMING 02-2001
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