Omron SRM1 - PROGRAMING 02-2001, Руководство по программированию

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2-3 Section CPM1/CPM1A Interrupt Functions
82
Use the following steps to program input interrupts using the Counter Mode.
1, 2, 3... 1. Write the set values for counter operation to the SR words shown in the fol-
lowing table. The set values are written between 0000 and FFFF (0 to
65,535). A value of 0000 will disable the count operation until a new value is
set and step 2, below, is repeated.
Interrupt Word
Input interrupt 0 SR 240
Input interrupt 1 SR 241
Input interrupt 2 SR 242
Input interrupt 3 SR 243
The SR words used in the Counter Mode (SR 240 to SR 243) contain hexa-
decimal data, not BCD. If the Counter Mode is not used, these words can be
used as work bits.
Note These SR words are cleared at the beginning of operation, and must
be written from the program.
2. With the INT(89) instruction, refresh the Counter Mode set value and enable
interrupts.
(@)INT(89)
003
000
D
If D bits 0 to 3, which correspond to input interrupts 0 to 3,
are set to “0,” then the set value will be refreshed and inter-
rupts will be permitted.
0: Counter mode set value refreshed and mask cleared.
1: Not refreshed.
Be sure to set the corresponding bit to 1 if an input interrupt isn’t being con-
trolled.
The input interrupt for which the set value is refreshed will be enabled in Counter
Mode. When the counter reaches the set value, an interrupt will occur, the count-
er will be reset, and counting/interrupts will continue until the counter is stopped.
Note 1. If the INT(89) instruction is used during counting, the present value (PV) will
return to the set value (SV). You must, therefore, use the differentiated form
of the instruction or an interrupt may never occur.
2. The set value will be set when the INT(89) instruction is executed. If inter-
rupts are already in operation, then the set value will not be changed just by
changing the content of SR 240 to SR 243, i.e., if the contents are changed,
the set value must be refreshed by executing the INT(89) instruction again.
Interrupts can be masked using the same process used with the Input Interrupt
Mode, but if the masked interrupts are cleared using the same process, the inter-
rupts will operate in Input Interrupt Mode, not Counter Mode.
Interrupt signals received for masked interrupts can also be cleared using the
same process as for the Input Interrupt Mode.
Counter PV in Counter Mode
When input interrupts are used in Counter Mode, the counter PV will be stored in
the SR word corresponding to input interrupts 0 to 3. Values are 0000 to FFFE (0
to 65,534) and will equal the counter PV minus one.
Interrupt Word
Input interrupt 0 SR 244
Input interrupt 1 SR 245
Input interrupt 2 SR 246
Input interrupt 3 SR 247
Example: The present value for an interrupt whose set value is 000A will be re-
corded as 0009 immediately after INT(89) is executed.
Note Even if input interrupts are not used in Counter Mode, these SR bits cannot be
used as work bits.