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151
Data Registers
Section 4-12
Note
Be sure to use PLC memory addresses in Index Registers.
4-12 Data Registers
The sixteen Data Registers (DR0 to DR15) are used to offset the PLC mem-
ory addresses in Index Registers when addressing words indirectly.
The value in a Data Register can be added to the PLC memory address in an
Index Register to specify the absolute memory address of a bit or word in I/O
memory. Data Registers contain signed binary data, so the content of an
Index Register can be offset to a lower or higher address.
D1001 and D1000
stored in IR0
or
Actual memory address of
CIO 0 (0000C000 hex)
stored in IR0
Contents of IR0 stored in
D01001 and D01000
D02001 and D02000
stored in IR0
or
Actual memory address
CIO 5 (0000C005 hex)
stored in IR0
Contents of IR0 stored in
D02001 and D02000
Peripheral servicing
Read D01001
and D01000
Read D02001
and D02000
IR storage words for task 2
IR storage words for task 1
or
or
Task 1
Task 2
Содержание CP1L-L14D Series
Страница 2: ...CP1L L14D CP1L L20D CP1L M30D CP1L M40D CP1L CPU Unit Operation Manual Revised June 2007...
Страница 3: ...iv...
Страница 9: ...x...
Страница 13: ...xiv TABLE OF CONTENTS...
Страница 21: ...xxii...
Страница 33: ...xxxiv Conformance to EC Directives 6...
Страница 65: ...32 Function Blocks Section 1 5...
Страница 153: ...120 CP CPM1A series Expansion I O Unit Wiring Section 3 6...
Страница 523: ...490 Troubleshooting Unit Errors Section 9 4...
Страница 531: ...498 Replacing User serviceable Parts Section 10 2...
Страница 563: ...530 Auxiliary Area Allocations by Function Appendix C...
Страница 611: ...578 Auxiliary Area Allocations by Address Appendix D...
Страница 638: ...605 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Страница 639: ...606 Connections to Serial Communications Option Boards Appendix F...
Страница 669: ...636 Index...
Страница 671: ...638 Revision History...