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122
Overview of I/O Memory Area
Section 4-1
4-1
Overview of I/O Memory Area
4-1-1
I/O Memory Area
This region of memory contains the data areas that can be accessed as
instruction operands. I/O memory includes the CIO Area, Work Area, Holding
Area, Auxiliary Area, DM Area, Timer Area, Counter Area, Task Flag Area,
Data Registers, Index Registers, Condition Flag Area, and Clock Pulse Area.
Note
1.
A0 to A447 are read only and cannot be written. A448 to A959 are
read/write.
2.
Bits can be manipulated using TST(350), TSTN(351), SET, SETB(532),
RSTB(533), and OUTB(534).
Instruction
I/O Memory
Area
Size
Range
Task usage
Allocation
Bit
access
Word
access
Access
Change
from CX-
Programmer
Forcing
bit
status
Read
Write
CIO
Area
I/O Area
Input
Area
1,600 bits
(100
words)
CIO 0 to
CIO 99
Shared by
all tasks
CP1L CPU
Units and CP-
series Expan-
sion Units or
Expansion I/O
Units
OK
OK
OK
OK
OK
OK
Output
Area
1,600 bits
(100
words)
CIO 100
to CIO
199
OK
OK
OK
OK
OK
OK
1:1 Link Area
1,024 bits
(64 words)
CIO 3000
to CIO
3063
1:1 Links
OK
OK
OK
OK
OK
OK
Serial PLC Link Area
1,440 bits
(90 words)
CIO 3100
to CIO
3189
Serial PLC
Links
OK
OK
OK
OK
OK
OK
Work Area
14,400
bits (900
words)
CIO 3800
to CIO
6143
---
OK
OK
OK
OK
OK
OK
Work Area
8,192 bits
(512
words)
W000 to
W511
---
OK
OK
OK
OK
OK
OK
Holding Area
8,192 bits
(512
words)
H000 to
H511
(Note 6)
---
OK
OK
OK
OK
OK
OK
Auxiliary Area
15,360
bits (960
words)
A000 to
A959
---
OK
---
OK
Note 1
Note 1
No
TR Area
16 bits
TR0 to
TR15
---
OK
OK
OK
OK
No
No
Data Memory Area
32,768
words
D00000
to
D32767
(Note 7)
---
No
(Note
2)
OK
OK
OK
OK
No
Timer Completion Flags
4,096 bits
T0000 to
T4095
---
OK
---
OK
OK
OK
OK
Counter Completion Flags
4,096 bits
C0000 to
C4095
---
OK
---
OK
OK
OK
OK
Timer PVs
4,096
words
T0000 to
T4095
---
---
OK
OK
OK
OK
No
(Note 4)
Counter PVs
4,096
words
C0000 to
C4095
---
---
OK
OK
OK
OK
No
(Note 5)
Task Flag Area
32 bits
TK0 to
TK31
---
OK
---
OK
No
No
No
Index Registers
16 regis-
ters
IR0 to
IR15
Function
separately in
each task
(Note 3)
---
OK
OK
Indirect
address-
ing only
Specific
instruc-
tions only
No
No
Data Registers
16 regis-
ters
DR0 to
DR15
---
No
OK
OK
OK
No
No
Содержание CP1L-L14D Series
Страница 2: ...CP1L L14D CP1L L20D CP1L M30D CP1L M40D CP1L CPU Unit Operation Manual Revised June 2007...
Страница 3: ...iv...
Страница 9: ...x...
Страница 13: ...xiv TABLE OF CONTENTS...
Страница 21: ...xxii...
Страница 33: ...xxxiv Conformance to EC Directives 6...
Страница 65: ...32 Function Blocks Section 1 5...
Страница 153: ...120 CP CPM1A series Expansion I O Unit Wiring Section 3 6...
Страница 523: ...490 Troubleshooting Unit Errors Section 9 4...
Страница 531: ...498 Replacing User serviceable Parts Section 10 2...
Страница 563: ...530 Auxiliary Area Allocations by Function Appendix C...
Страница 611: ...578 Auxiliary Area Allocations by Address Appendix D...
Страница 638: ...605 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Страница 639: ...606 Connections to Serial Communications Option Boards Appendix F...
Страница 669: ...636 Index...
Страница 671: ...638 Revision History...