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62
CP1L CPU Unit Operation
Section 2-3
2-3
CP1L CPU Unit Operation
2-3-1
Overview of CPU Unit Configuration
The CP1L CPU Unit memory consists of the following blocks.
(1)
• Data is backed up from RAM to the built-in flash memory when
changes are made, e.g., from the CX-Programmer.
• When the power supply is turned ON, data is transferred from the built-
in flash memory to RAM.
(2)
• A CX-Programmer operation can be used to transfer DM Area initial
values from RAM to the built-in flash memory.
• The PLC Setup can be set so that DM Area initial values are trans-
ferred from the built-in flash memory to RAM when the power supply
is turned ON.
(3)
• CX-Programmer operations can be used to transfer data from RAM to
the Memory Cassette or from the built-in flash memory to the Memory
Cassette.
RAM
DM Area
(2)
(3)
(1)
(1)
(3)
(3)
(3)
(3)
(3)
Built-in inputs
CPU Unit
User program
I/O memory
AR Area
PLC Setup
and other
parameters
Flash memory
User
program
Comment
memory
FB program
memory
DM Area
initial values
PLC Setup
and other
parameters
Memory
Cassette
Analog adjuster
External analog
setting input
Built-in outputs
Access
Содержание CP1L - 12-2007
Страница 3: ...iv...
Страница 9: ...x...
Страница 13: ...xiv TABLE OF CONTENTS...
Страница 21: ...xxii...
Страница 33: ...xxxiv Conformance to EC Directives 6...
Страница 65: ...32 Function Blocks Section 1 5...
Страница 428: ...395 Clock Section 6 9...
Страница 429: ...396 Clock Section 6 9...
Страница 523: ...488 Troubleshooting Unit Errors Section 9 4...
Страница 531: ...496 Replacing User serviceable Parts Section 10 2...
Страница 563: ...528 Auxiliary Area Allocations by Function Appendix C...
Страница 611: ...576 Auxiliary Area Allocations by Address Appendix D...
Страница 638: ...603 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Страница 639: ...604 Connections to Serial Communications Option Boards Appendix F...
Страница 669: ...634 Index...
Страница 671: ...636 Revision History...