NEC MPD703030A, Руководство пользователя

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CHAPTER 10 SERIAL INTERFACE FUNCTION
User’s Manual U13850EJ4V0UM
264
Figure 10-10. IIC Status Register n (IICSn) (3/3)
After reset: 00H R Address: FFFFF342H, FFFFF352H
<7> <6> <5> <4> <3> <2> <1> <0>
IICSn MSTSn ALDn EXCn COIn TRCn ACKDn STDn SPDn
(n = 0, 1)
ACKDn Detection of ACK
0 ACK was not detected.
1 ACK was detected.
Condition for clearing (ACKDn = 0) Condition for setting (ACKD = 1)
•
When a stop condition is detected
•
At the rising edge of the next byte’s first clock
•
Cleared by LRELn = 1
•
When IICEn changes from 1 to 0
•
When RESET is input
•
After the SDAn line is set to low level at the rising edge
of the SCLn’s ninth clock
STDn Detection of start condition
0 Start condition was not detected.
1 Start condition was detected. This indicates that the address transfer period is in effect
Condition for clearing (STDn = 0) Condition for setting (STDn = 1)
•
When a stop condition is detected
•
At the rising edge of the next byte’s first clock following
address transfer
•
Cleared by LRELn = 1
•
When IICEn changes from 1 to 0
•
When RESET is input
When a start condition is detected
SPDn Detection of stop condition
0 Stop condition was not detected.
1 Stop condition was detected. The master device’s communication is terminated and the bus is released.
Condition for clearing (SPDn = 0) Condition for setting (SPDn = 1)
•
At the rising edge of the address transfer byte’s first
clock following setting of this bit and detection of a start
condition
•
When IICEn changes from 1 to 0
•
When RESET is input
When a stop condition is detected
Remark LRELn: Bit 6 of IIC control register n (IICCn)
IICEn: Bit 7 of IIC control register n (IICCn)