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MELSEC-Q
10 DEDICATED INSTRUCTIONS
10 DEDICATED INSTRUCTIONS
Dedicated instructions are used to simplify programming when using intelligent function
module functions.
This chapter describes the dedicated instructions for the Q series C24, which is part of
the functions of the QCPU (in Q mode) explained in this manual.
10.1 Dedicated Instruction List and Available Devices
(1) Dedicated instruction list
The following table lists the dedicated instructions explained in this chapter.
Application
Dedicated
instruction
Description of function
Explanation
page
On-demand function
transmission
ONDEMAND
1
Sends data using the on-demand function of the MC
protocol.
Section 10.2
OUTPUT
1
Sends data for the specified data count.
Section 10.3
Non procedure protocol
communication
INPUT
1
Reads received data.
Section 10.4
BIDOUT
1
Sends data for the designated data count.
Section 10.5
Bidirectional protocol
communication
BIDIN
1
Reads received data.
Section 10.6
Predefined protocol
communication
CPRTCL
Executes the protocol setting data written to the flash ROM
using the predefined protocol support function.
Section 10.7
Communication status
confirmation
SPBUSY
Reads the status of data transmission/reception via a
dedicated instruction.
Section 10.8
Receive data clear
CSET
Perform the receive data clear without stopping the
transmission processing during the non procedure protocol.
Section 10.9
POINT
The user should not change data values (control data, request data, etc.)
designated by a dedicated instruction until the execution of the dedicated instruction
is completed.
1 To change the following values preset in the buffer memory for use of
dedicated instructions, use GX Configurator-SC or execute the CSET
instruction (Initial setting) before starting data exchange. (See the User’s
Manual (Application).)
• Word/byte units designation (address: 96
H
/136
H
)
• Buffer memory head address designation for on-demand function
designation (address: A0
H
/140
H
)
• Transmission buffer memory head address designation (address: A2
H
/
142
H
)
• Transmission buffer memory length designation (address: A3
H
/143
H
)
• Receive buffer memory head address designation (address: A6
H
/146
H
)
• Receive buffer memory length designation (address: A7
H
/147
H
)
The dedicated instructions are executed based on the values preset in the
buffer memory at module startup or those that have been changed by the
CSET instruction (Initial setting).
10
Содержание MELSEC QJ71C24
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