Mitsubishi MELSEC QJ71C24, Руководство пользователя

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App. - 2 App. - 2
MELSEC-Q
APPENDIXES
Q series C24
(function version)
QJ71C24N
(-R2/R4)
QJ71C24
(-R2)
Function
B B A
Communication using bidirectional protocol
Data transmission/reception in any format
Data reception by interrupt programs
ASCII data transmission/reception by ASCII-BIN conversion
Data transmission/reception by specifying transparent code
Specification of Receive transparent code
Specification of Transmission transparent 1st ( 3)
Multiple specification of Transmission transparent 2nd to 10th
Communication using pre-defined protocol
(
1
)
Execution of the protocol selected from the pre-defined protocol library
(
1
)
Execution of the created or edited protocol
(
1
)
Addition of Sign character, Number of decimals, and Delimiter settings to Conversion variable
(
1
)
Variable number of characters setting for Non-verified reception
(
1
)
Echo back enable/disable setting for RS-422/485 interface
(
1
)
Registration of user frame for data communication
Registration of changeable data (added 05
H
, 0B
H
, 11
H
, and 17
H
)
Registration of changeable data (added 04
H
and 0A
H
)
Registration of changeable data (added E5
H
and EB
H
)
(
1
)
Communication via public network, etc. (modem function)
Automatic initialization of modem
(
1
)
Remote password check
Callback (
4
)
(
1
)
DC code control (including Xon/Xoff control)
Transmission control
DTR/DSR control
Mode switching
Switch to GX Developer connection mode
Independent/linked operation of each interface
Support for 230400 bps
Data transmission/reception at low speed (transmission speed: 50 bps)
Control of RS(RTS) and ER(DTR) signal states
Programmable controller CPU information clear
(
1
)
Data communication monitoring time
Non procedure and non reception monitoring time format designation
Transmission control start/end free area designation
Communication data monitoring function
UINI instruction
(
1
)
Monitoring/testing of initial settings and setting values with utility package
Startup from the system monitor (
5
)
Addition to the setting items
(See (2))
—
GX Developer and GOT connection
Simultaneous connection of GX Developer and GOT to the Q series C24 (
6
)
Support for multiple CPU system
Communication with non-control CPU using the MC protocol
Communication with QnA compatible 4C frame (ASCII code) Formats 1 to 4
Communication with QnA compatible 4C frame (binary code) Format 5
Multiple CPU setting using GX Developer (I/O assignment, switch setting, interrupt pointer setting,
etc.)
App.