300
PLSY
n1
: Frequency or the number of the device where frequency is stored (BIN 16 bits)
n2
: Outputs count or the number of the device where the outputs count is stored (BIN 16 bits)
: Number of the device to which pulses are output (bits)
*1:
Only output (Y) can be used.
Function
(1) Outputs a pulse at a frequency designated by n1 the number of times designated by n2, to the output module with the
output signal (Y) designated by .
(2) Frequencies between 1 to 100 Hz can be designated by n1.
If n1 is other than 1 to 100 Hz, the PLSY instruction will not be executed.
(3) The number of outputs that can be designated by n2 is between 0 to 65535 (0000
H
to FFFF
H
).
If n2 is set to "0", pulses are continuously output.
(4) Only an output number corresponding to the output module can be designated for pulse output at .
(5) Pulse output commences with the command leading edge of the PLSY instruction.
Pulse output is suspended when the PLSY instruction command goes OFF.
1. With the PLSY instruction, the argument device data is registered in the work area of the CPU module and counting
operation is processed as a system interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) For this reason, the pulses that can be output
must have longer ON and OFF times than the interrupt interval of the CPU module. The interrupt interval of individual
modules is shown below:
2. Do not change the argument for the PLSY instruction during pulse output directed by the PLSY instruction (while the
execution command is ON). To change the argument, turn OFF the execution command.
3. The PLSY instruction can be used only once in all programs executed by the CPU module. The second and the
subsequent PLSY instructions are not processed.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
PLSY
Fixed cycle pulse output
6.8.8
PLSY
Setting
Data
Internal Devices
R, ZR
J \
U \G
Zn
Constants
K, H
Other
Bit
Word
Bit
Word
n1
––
n2
––
*1
––
––
CPU Module Type Name
Interrupt Interval
High Performance model QCPU, Process CPU,
Universal model QCPU, LCPU
1 ms
Error
code
Error details
Q00J/
Q00/
Q01
QnH
QnPH QnPRH
QnU
LCPU
4101
The device specified by exceeds the range of the corresponding
device.
––
––
––
––
Basic
Redundant
Process
High
performance
Universal
LCPU
Command
PLSY
n2
n1
D
PLSY
D
D
D
D
D