699
D.DDRD, DP.DDRD
1
10
3
4
6
6
7
8
10.3
D
.DDR
D, DP.DD
R
D
Caut
i
on
(1) Digit specification of bit device is possible for n, , and . Note that when the digit specification of bit device is made to
or , the following conditions must be met.
• Digits are specified by 16 bits (4 digits).
• The start bit device is multiples of 16 (10
H
).
(2) Execute this instruction after checking that the write target CPU is powered on. Not doing so may end up no processing.
(3) If changing a range of the device specified at setting data between after execution of the instruction and turn-on of the
completion device, data to be stored by system (completion status, completion device) cannot be stored normally.
(4) SB, SW, SM, and SD include system information area. Take care not to destroy the system information when writing data
to the devices above with the D(P).DDWR instruction of the multiple CPU high-speed transmission dedicated instruction.
*1:
Index modification cannot be made to setting data n.
*2:
Index modification cannot be made to setting data from
to
.
*3:
Local devices cannot be used.
*4:
File registers cannot be used per program.
*5:
FD @ (indirect specification) cannot be used.
*6:
FX and FY cannot be used.
Set
Data
*7:
By specifying a file register (R, ZR), data can be read to devices in another CPU, outside the range of host CPU.
*8:
By specifying the start device by " ", data can be read to devices in another CPU, outside the range of host CPU.
*9:
Indexed devices cannot be specified (e.g. D0Z0).
D.DDRD, DP.DDRD Reading Devices from Another CPU
10.3
D.DDRD, DP.DDRD
• Universal model QCPU: The serial number (first five digits) is
"10012" or later.
• Q00UJCPU, Q00UCPU, Q01UCPU, and Q02UCPU cannot
be used.
Setting
Data
Internal Devices
R, ZR
J \
U \G
Zn
Constants
K, H
Other
Bit
Word
Bit
Word
n
*1
––
––
––
*2
––
*3
*4
––
––
––
*2
––
––
––
––
*2
––
––
––
––
*2
*6
––
*4
––
––
––
Setting data
Description
Data type
n
The result of dividing the start I/O number of another CPU by 16
CPU No.1: 3E0
H
, CPU No.2: 3E1
H
, CPU No.3: 3E2
H
, CPU No.4: 3E3
H
BIN 16 bits
Start device of the host CPU that stores control data
Device name
Start device of another CPU that stores data to be read
Start device of the host CPU where read data will be stored
Device
*7
Character
string
*8*9
Completion device
Bit
S2
D1
S2
D1
Bas
i
c
Hi
gh
performance
Process
Redundant
L
CP
U
Universal
Ver.
D.DDRD
DP.DDRD
Command
Command
D
.
DDRD
n
S1
S2
D1
D2
DP
.
DDRD
n
S1
S2
D1
D2
S1
S2
D1
D2
S1
D2
S1
S2
D1
D2