16
Watchdog timer reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .605
Timing pulse generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .606
Time check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .607
Direct 1-byte read from file register . . . . . . . . . . . . . . . . . . . . .608
File register direct 1-byte write . . . . . . . . . . . . . . . . . . . . . . . . .609
Indirect address read operations . . . . . . . . . . . . . . . . . . . . . . .611
Numerical key input using keyboard . . . . . . . . . . . . . . . . . . . . .612
Batch save of index register . . . . . . . . . . . . . . . . . . . . . . . . . . .616
Batch recovery of index register . . . . . . . . . . . . . . . . . . . . . . . .616
Reading module information . . . . . . . . . . . . . . . . . . . . . . . . . . .618
Reading module model name . . . . . . . . . . . . . . . . . . . . . . . . . .622
Trace set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .626
Trace reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .626
Writing data to designated file . . . . . . . . . . . . . . . . . . . . . . . . .628
Reading data from designated file . . . . . . . . . . . . . . . . . . . . . .638
Writing data to standard ROM . . . . . . . . . . . . . . . . . . . . . . . . .649
Reading data from standard ROM . . . . . . . . . . . . . . . . . . . . . .651
Loading program from memory card . . . . . . . . . . . . . . . . . . . .652
Unloading program from program memory . . . . . . . . . . . . . . .654
Loading and unloading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .656
High-speed block transfer of file register . . . . . . . . . . . . . . . . .658
User Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .662
CHAPTER 8 INSTRUCTIONS FOR DATA LINK
Refresh for the designated module . . . . . . . . . . . . . . . . . . . . .665
Registering routing information . . . . . . . . . . . . . . . . . . . . . . . . .670
CHAPTER 9 MULTIPLE CPU DEDICATED INSTRUCTION
Writing to host CPU shared memory . . . . . . . . . . . . . . . . . . . .673
Writing to host CPU shared memory . . . . . . . . . . . . . . . . . . . .676
FROM, FROMP, DFRO, Reading from other CPU shared memory . . . . . . . . . . . . . . . .681
CHAPTER 10 MULTIPLE CPU HIGH-SPEED TRANSMISSION DEDICATED
Writing Devices to Another CPU . . . . . . . . . . . . . . . . . . . . . . .696
Reading Devices from Another CPU . . . . . . . . . . . . . . . . . . . .699