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CHAPTER 9
MULTIPLE CPU DEDICATED
INSTRUCTION
9.1
Writing to the CPU Shared Memory of Host CPU
The S.TO or TO instruction is used to write to the CPU shared memory of the host station in the multiple CPU system.
The following table indicates the usability of the S.TO and TO instructions.
(1) Operation of S.TO instruction
The S.TO instruction can write data to the CPU shared memory of the host CPU module.
The following figure shows the processing performed when the S.TO instruction is executed in CPU No. 1.
(2) Operation of the TO instruction
The TO instruction can write device memory data to the following memories.
• CPU shared memory of host CPU module
• Buffer memory of intelligent function module
CPU Module
S.TO Instruction
TO Instruction
Basic model QCPU
Q00JCPU
Unusable
Unusable
Q00CPU, Q01CPU
Usable
Usable
High Performance model QCPU
Q02CPU, Q02HCPU,
Q06HCPU, Q12HCPU,
Q25HCPU
Usable
Unusable
Process CPU
Q02PHCPU, Q06PHCPU,
Q12PHCPU, Q25PHCPU
Usable
Unusable
Redundant CPU
Q12PRHCPU, Q25PRHCPU
Unusable
Unusable
Universal model QCPU
Q00UJCPU
Unusable
Unusable
Q00UCPU, Q01UCPU, Q02UCPU,
Q03UDCPU, Q04UDHCPU,
Q06UDHCPU, Q10UDHCPU,
Q13UDHCPU, Q20UDHCPU,
Q26UDHCPU, Q03UDECPU,
Q04UDEHCPU, Q06UDEHCPU,
Q10UDEHCPU, Q13UDEHCPU,
Q20UDEHCPU, Q26UDEHCPU,
Q50UDEHCPU, Q100UDEHCPU
Usable
Usable
LCPU
L02CPU, L26CPU-BT, L02CPU-P,
L26CPU-PBT
Unusable
Unusable
[ SP.TO H3E0 n2 n3 n4 D ]
De
v
ice
memory
CP
U
shared
memory
De
v
ice
memory
Buffer
memory
CP
U
shared
memory
CP
U
No. 1
CP
U
No. 2
Intelligent
function module
Data
w
rite
Designation of CP
U
shared memory in CP
U
No. 1