52
*1:
The number of basic steps is three for the Universal model QCPU and LCPU only.
*2:
The number of steps may vary depending on the device and type of CPU module being used.
Note 1) When using a High Performance model QCPU, Process CPU or Redundant CPU, the number of steps increases but
the processing speed becomes faster.
Note 2) The number of steps may increase due to the conditions described in Page 110, Section 3.8.
Category
Inst
ructi
on Sym
b
o
l
Symbol
Processing Details
Execution
Condition
Nu
mber o
f Ba
sic S
tep
s
Sub
set
See f
o
r Des
cr
iptio
n
Exclusive
OR
DXOR
*3
DXORP
BKXOR
5
-
BKXORP
NON
exclusive
logical sum
WXNR
3
WXNRP
WXNR
4
*1
WXNRP
DXNR
*2
DXNRP
DXNR
*3
DXNRP
BKXNR
5
-
BKXNRP
Component
Device
Number of
Steps
High Performance model QCPU
Process CPU
Redundant CPU
• Word device: Internal device (except for file register ZR)
• Bit device:
Devices whose device Nos. are multiples of 16, whose digit
designation is K8, and which use no indexing.
• Constant:
No limitations
5
Note 1)
Devices other than above
3
Note 2)
Basic model QCPU
Universal model QCPU
LCPU
All devices that can be used
3
Note 2)
DXOR
S1 S2 D
(S1+1
,
S1)
(S2+1
,
S2)
(D+1
,
D)
DXORP
S1 S2 D
BKXOR
n
S1 S2 D
(S1)
(S2)
(D)
n
BKXORP
n
S1 S2 D
WXNR
D
S
(D)
(S)
(D)
WXNRP
D
S
WXNR
S1 S2 D
(S1)
(S2)
(D)
WXNRP
S1 S2 D
DXNR
D
S
(D+1
,
D)
(S+1
,
S)
(D+1
,
D)
DXNRP
D
S
DXNR
S1 S2 D
(S1+1
,
S1)
(S2+1
,
S2)
(D+1
,
D)
DXNRP
S1 S2 D
BKXNR
n
S1 S2 D
(S1)
(S2)
(D)
n
BKXNRP
n
S1 S2 D