281
DI, EI, IMASK
1
2
3
4
6
7
8
6.6
P
rogr
am Execution Contr
ol Instr
uct
ions
6.6.1
D
I, EI, IMASK
EI
The EI instruction is used to clear the interrupt disable state resulting from the execution of the DI instruction, and to
create a state in which the interrupt program designated by the interrupt pointer number enabled by the IMASK
instruction and the fixed cycle execution type program can be executed.
When the IMASK instruction is not executed, I32 to I47 are disabled.
IMASK
(1) Enables/disables the execution of the interrupt program marked by the designated interrupt pointer by using the bit
pattern of 16 points from the device designated by .
• 1(ON).......Interrupt program execution enabled
• 0(OFF).....Interrupt program execution disabled
(2) The interrupt pointer numbers corresponding to the individual bits are as shown below:
(3) When the power is turned on or the CPU module is reset, the interrupt programs are as follows.
(a) High Performance model QCPU, Process CPU, and Redundant CPU
Execution of interrupt programs I0 to I31 and I48 to I255 is enabled, and execution of interrupt programs I32 to I47
is disabled.
(b) Universal model QCPU and LCPU
Execution of interrupt programs I0 to I31 and I45 to I255 is enabled, and execution of interrupt programs I32 to I44
is disabled.
(4) The status of devices , +1, +2, and +3 to +15 are stored in SD715 to SD717 and SD781 to SD793 (storage
area for the IMASK instruction mask pattern).
(5) Although the special registers are separated as SD715 to SD717 and SD781 to SD793, device numbers should be
designated
as
to +15
successively.
Sequence
program
D
I
Sequence
program
EI
I
n
FE
D
N
I
nterrupt
programs
E
ven
i
f
a
cause
of
i
nterrupt
occurs
dur
i
ng
the
execut
i
on
of
the
sequence
program
between
the
D
I
and
EI i
nstruct
i
ons
,
execut
i
on
of
the
i
nterrupt
program
i
s
suspended
unt
il
the
process
i
ng
of
the
sequence
program
i
s
comp
l
eted
.
S
b15
I15 I14
b0
I13
I12
I11
I10
I9
I8
I7
I6
I5
I4
I3
I2
I1
I0
b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
I31 I30
I29
I28
I27
I26
I25 I24
I23
I22
I21
I20
I19
I18
I17
I16
I47 I46
I45
I44
I43
I42
I41 I40
I39
I38
I37
I36
I35
I34
I33
I32
+ 1
+ 2
S
S
S
I63 I62
I61
I60
I59
I58
I57 I56
I55
I54
I53
I52
I51
I50
I49
I48
+ 3
S
I79 I78
I77
I76
I75
I74
I73 I72
I71
I70 I69
I68
I67
I66
I65
I64
+ 4
S
I95 I94
I93
I92
I91
I90
I89 I88
I87
I86
I85
I84
I83
I82
I81
I80
+ 5
S
I111 I110 I109 I108 I107 I106 I105 I104 I103 I102 I101 I100 I99
I98
I97
I96
+ 6
S
I127 I126 I125 I124 I123 I122 I121 I120 I119 I118 I117 I116 I115 I114 I113 I112
+ 7
S
I143 I142 I141 I140 I139 I138 I137 I136 I135 I134 I133 I132 I131 I130 I129 I128
+ 8
S
I159 I158 I157 I156 I155 I154 I153 I152 I151 I150 I149 I148 I147 I146 I145 I144
+ 9
S
I175 I174 I173 I172 I171 I170 I169 I168 I167 I166 I165 I164 I163 I162 I161 I160
+10
S
I191 I190 I189 I188 I187 I186 I185 I184 I183 I182 I181 I180 I179 I178 I177 I176
+11
S
I207 I206 I205 I204 I203 I202 I201 I200 I199 I198 I197 I196 I195 I194 I193 I192
+12
S
I223 I222 I221 I220 I219 I218 I217 I216 I215 I214 I213 I212 I211 I210 I209 I208
+13
S
I239 I238 I237 I236 I235 I234 I233 I232 I231 I230 I229 I228 I227 I226 I225 I224
+14
S
I255 I254 I253 I252 I251 I250 I249 I248 I247 I246 I245 I244 I243 I242 I241 I240
+15
S
S
S
S
S
S
S
S