270
XCH, XCHP, DXCH, DXCHP
[Operation]
,
: Head number of the devices where the data to be exchanged is stored (BIN 16/32 bits)
Function
XCH
(1) Conducts 16-bit data exchange between and .
DXCH
(1) Conducts 32-bit data exchange between +1, and +1, .
XCH, XCHP
16-bit data exchanges
DXCH, DXCHP
32-bit data exchanges
6.4.9
XCH, XCHP, DXCH, DXCHP
Setting
Data
Internal Devices
R, ZR
J \
U \G
Zn
Constants
Other
Bit
Word
Bit
Word
––
––
D11
,
D10
D13
,
D12
D15
,
D14
D17
,
D16
Transfer
Y1F
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
Y14 Y13
Y0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Ignored
20 bits
(
five digits
)
data
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Filled with 0s
20 bits
(
five digits
)
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
b31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
b20 b19
b0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Basic
Process
High
performance
Redundant Universal
LCPU
Command
Command
P
D1
D2
D1
D2
XCH, DXCH
XCHP, DXCHP
indicates an instruction s
y
mbol of XCH
,
DXCH.
D1
D2
D1
D2
D1
D2
b7
b0
b15
b8
Before
execut
i
on
After
execut
i
on
0 0 0 0 0 1 1 1
0 0
0
0
1
1
1
0
1 1 1 1 0 0 0 0
0 0
0
0
1
1
1
1
0 0 0 0 0 1 1 1
0 0
0
0
1
1
1
0
1 1 1 1 0 0 0 0
0 0
0
0
1
1
1
1
D1
D2
b7
b0
b15
b8
b7
b0
b15
b8
b7
b0
b15
b8
D1
D2
D1
D1
D2
D2
Before
execut
i
on
After
execut
i
on
+
1
b15
b0
+
1
b31
b16
+
1
+
1
1 1 1
1 1 1 1
1 1
1
0
0
0
0
1 1 1
0 0 0 0
0 0
0
1
1
1
1
1 1 1
1 1 1 1
1 1
1
0
0
0
0
1 1 1
0 0 0 0
0 0
0
1
1
1
1
D1
D2
D1
b15
b0
b31
b16
b15
b0
b31
b16
b15
b0
b31
b16
D1
D1
D2
D2
D2