701
D.DDRD, DP.DDRD
1
10
3
4
6
6
7
8
10.3
D
.DDR
D, DP.DD
R
D
Operat
i
on
E
rror
In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an error code is stored into
SD0.
In any of the following cases, the instruction is completed abnormally, and an error code is stored into a device specified
at completion status storage device ( +0).
Error
code
Error details
Q00J/
Q00/
Q01
QnH
QnPH QnPRH
QnU
LCPU
4350
Specified another CPU is incorrect. Or the multiple CPU high-speed
transmission dedicated instruction is disabled.
• The reserved CPU has been specified.
• A CPU that is not mounted has been specified.
• Another CPU start I/O number divided by 16n is not within the range
from 3E0
H
to 3E3
H
.
• The instruction was executed when the module is set to "Do not use
multiple CPU high speed transmission".
• The instruction was executed with the CPU module that cannot use
this instruction.
• The host CPU has been specified.
• The CPU where the instruction cannot be executed has been
specified.
––
––
––
––
––
4351
Another CPU does not support this instruction.
––
––
––
––
––
4352
The number of devices is wrong.
––
––
––
––
––
4353
The device that cannot be used for the instruction has been specified.
––
––
––
––
––
4354
A device has been specified by the character string that cannot be
used.
––
––
––
––
––
4355
The number of read points ( +1) is other than 0 to 100.
––
––
––
––
––
Error
code
Error details
Q00J/
Q00/
Q01
QnH
QnPH QnPRH
QnU
LCPU
0010
H
The request of the instruction to the target CPU is more than the
acceptable value (no empty block exists in the multiple CPU high speed
transmission area).
––
––
––
––
––
1001
H
The device for another CPU specified at cannot be used at another
CPU, or is out of device range.
––
––
––
––
––
1003
H
The response of the instruction from another CPU module cannot be
returned (no empty blocks exist in the multiple CPU high speed
transmission area).
––
––
––
––
––
1081
H
The number of read points set with the D(P).DDRD instruction is other
than 0.
––
––
––
––
––
S1
S1
S2