254
EDCON, EDCONP
Program Example
(1) The program which converts 32-bit floating-point real number of the devices, D10 to D11, into 64-bit floating-point real
number when X0 turns ON, and outputs the conversion result to the devices, D0 to D3.
[Ladder Mode]
[List Mode]
: Conversion source data, or head number of the device where conversion source data is stored (Real number (double precision))
: Head number of the device where the converted data is stored (Real number (single precision))
Function
Converts 64-bit floating-point real number specified for into 32-bit floating-point real number, and stores the conversion
result to the device specified for .
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into
SD0.
EDCON, EDCONP
Conversion from Double precision to Single precision
6.3.17
EDCON, EDCONP
Setting
Data
Internal Devices
R, ZR
J \
U \G
Zn
Constants
E
Other
Bit
Word
Bit
Word
––
––
––
––
––
––
––
––
Error
code
Error details
Q00J/
Q00/
Q01
QnH
QnPH QnPRH
QnU
LCPU
4140
The specified device value is not within the following range:
0,2
-1022
| Specified device value | < 2
1024
The specified device value is 0.
––
––
––
––
4141
The conversion result exceeds the following range (when an overflow
occurs):
2
128
| Conversion result |
––
––
––
––
Step
Instruction
Device
Universal
LCPU
Basic
High
performance
Process
Redundant
EDCON
EDCONP
S
D
S
D
EDCON
EDCONP
Command
Command
S
D
S
D
S
D
+
1
D
D
32
-
b
i
t
f
l
oat
i
ng
-
po
i
nt
rea
l
number
+
3
+
2
+
1
S
6
4-
b
i
t
f
l
oat
i
ng
-
po
i
nt
rea
l
number
S
S
S