Rev. 3.0, 10/02, page 75 of 686
Section 5 Interrupt Controller
5.1
Features
•
Two interrupt control modes
Any of two interrupt control modes can be set by means of the INTM1 and INTM0 bits in
the system control register (SYSCR).
•
Priorities settable with IPR
An interrupt priority register (IPR) is provided for setting interrupt priorities. Eight priority
levels can be set for each module for all interrupts except NMI. NMI is assigned the highest
priority level of 8, and can be accepted at all times.
•
Independent vector addresses
All interrupt sources are assigned independent vector addresses, making it unnecessary for
the source to be identified in the interrupt handling routine.
•
Eight external interrupts (NMI,
IRQ7
, and
IRQ5
to
IRQ0
)
NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or falling
edge can be selected for NMI. Falling edge, rising edge, or both edge detection, or level
sensing, can be selected for
IRQ7
and
IRQ5
to
IRQ0
.
IRQ6
is an interrupt only for the on-
chip USB.
•
DTC and DMAC control
DTC or DMAC activation is performed by means of interrupts.
Содержание H8S/2215 Series
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