GRASS VALLEY IQUCP25, Руководство пользователя

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117
UCP - 3901
User Manual
Frame Sync
The
Frame Sync
page allows you to adjust the timing of SDI input signals relative to the
house reference when a 3G frame synchronization SDC is loaded. This supports
synchronous and asynchronous SDI input signals. The input signals will be synchronized
and realigned to the URS.
Figure 6 - 20:
Frame Sync Page
This section also displays the Processing Delay in milliseconds (ms) so you can manage the
processing delay on your system.
The UCP - 3901 / IQUCP25 / IQUCP50 has an integrated frame sync that supports
synchronous and asynchronous SDI input signals. The input signals will be synchronized
and realigned with respect to the chosen video reference signal. See
Genlock
in
Configuration on page 75.
Parameter Description
Enable Set to enable frame synchronization on this spigot.
V Offset (lines) Vertical timing offset in lines with respect to the chosen video
reference signal. See Genlock in Configuration on page 75.
H Offset (pixels) Horizontal timing offset in pixels with respect to the chosen video
reference signal. See Genlock in Configuration on page 75.
Min.
Delay Ref SDI Input
SDI
Output
Processing Delay
Async or Isochrone Inputs
Synced &Phase- Aligned
Inputs
Minimum Maximum 59Hz 50Hz
OFF Input 1080i ALL 2 fields 2 fields 33 ms 40 ms
720p,
1080p ALL 2 frames 2 frames 33 ms 40 ms
ON Input 1080p 1080p < 4 lines < 4 lines < 4 lines < 4 lines