Appendix G - Communications Gateway Module Installation Kit
3A2797ZAA
109
140
Additional Status
Bits
Bit 0: Heart Beat Signal from HFR/ NVH ADM Module.
Bit 1: System is “Ready” for Dispense Request.
Bit 2: ADM Lockout Active.
Bit 3: PLC/ Robot Control Active.
Bit 4: Active/ Valid PLC Heart Beat Signal Received by HFR.
Bit 5: Alarm is Active
Bit 6: Deviation is Active.
Bit 7: Advisory is Active.
Bit 8: Spare Bit indication for future use.
Bit 9: Dispensing is Disabled (ADM, PLC & Footswitch).
Bit 10:Clean Out Rod Process Active (L-Systems Only)
Bit 11-15: Spare bit indications for future use
Read
151
Error number
requiring
Acknowledgement
See error number table in next section. Writing to this register
with the error number read, will clear the Error code pop-up win
-
dow from the HFR screen. If the condition is still present after
acknowledgment, the same error number acknowledged will be
provided in the next read instruction below.
Write
152
Read
154
Error Number Active
in System
See error number table in next section. If more than 1 error is
present, the next read will provide the second error number pres
-
ent. If only 2 errors are present, the 3
rd
read will provide the 1
st
error provided. If this register is assigned one of the read configu
-
rable data registers (see next items in table), if more than 1 error is
present, the HFR will present all the active error numbers at
approximately a 1 hertz rate.
Read
161
Set or Read
Register
“Configurable Data
Element 1”
Assignment (Input
instance 11, I176 –
I191)
Register assignments must be an Even number, and correspond
to the Read Assignments in this Table. Once set (Write), the HFR/
NVH will remember the assignment, even after a power cycle.
Register assignments should be 16 bits wide data, or smaller.
Write
162
Read
163
Set or Read
Register
“Configurable Data
Element 2”
Assignment (Output
instance 12, I192 –
I207)
Register assignments must be an Even number, and correspond
to any Read Assignment in this Table. Once set (Write), the HFR/
NVH will remember the assignment, even after a power cycle.
Register assignments should be 16 bits wide data, or smaller
Write
164
Read
181
Set or Read
Register
“Configurable Data
Command 1”
Assignment (Output
instance 8, O88 –
O103)
Register assignments must be an Odd number, and correspond
to any Write Assignment in this Table. Once set (Write), the HFR/
NVH will remember the assignment, even after a power cycle.
Register assignments should be 16 bits wide, or smaller.
Write
182
Read
Data Exchange
Pointer
Designation
Description
Comments, Data Element Descriptions
Read/
Write
