156
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
SPI
Figure 18-8. SPI Status Timing for Modes 2 and 3
MODE 2, 3 (Phase=1)
Output on leading edge. Input on trailing edge.
SCLK, Polarity=0 (Mode 2)
MOSI
MISO
SCLK, Polarity=1 (Mode 3)
7
6
5
4
3
2
1
0
SS_
TX REG EMPTY
RX REG FULL
SPI COMPLETE
OVERRUN
Overrun occurs one-
half cycle before the
last bit is received.
Last bit of byte
is received.
All clocks and data for
this byte completed.
TX Buffer is
transferred into
the shifter.
7
7
6
5
4
3
2
1
0
7
TX Buffer is
transferred into
the shifter.
User writes the next byte.
Содержание PSoC CY8CTMG20 Series
Страница 4: ...4 Contents Overview Feedback...
Страница 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Страница 54: ...54 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Interrupt Controller Feedback...
Страница 62: ...62 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C General Purpose I O GPIO Feedback...
Страница 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Страница 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Страница 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Страница 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Страница 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Страница 186: ...186 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section E Registers Feedback...
Страница 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...