PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
271
MUX_CRx
1,D8h
21.4.13 MUX_CRx
Analog Mux Port Bit Enable Registers
This register is used to control the connection between the analog mux bus and the corresponding pin.
Port 4 is a 4-bit port, so the upper 4 bits of the MUX_CR4 register are reserved and return zeros when read.
For additional information, refer to the
Register Definitions on page 100
in the I/O Analog Multiplexer chapter.
7:0
ENABLE[7:0]
Each bit controls the connection between the analog mux bus and the corresponding port pin. For
example, MUX_CR2[3] controls the connection to bit 3 in Port 2. Any number of pins may be con-
nected at the same time.
0
No connection between port pin and analog mux bus.
1
Connect port pin to analog mux bus.
Individual Register Names and Addresses:
1,D8h
MUX_CR0 : 1,D8h
MUX_CR1 : 1,D9h
MUX_CR2 : 1,DAh
MUX_CR3 : 1,DBh
MUX_CR4 : 1,DFh
7
6
5
4
3
2
1
0
Access : POR
RW : 00
Bit Name
ENABLE[7:0]
Bits
Name
Description
Содержание PSoC CY8CTMG20 Series
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