745
32072H–AVR32–10/2012
AT32UC3A3
27.8.3.23
USB Host DMA Channel n Control Register
Register Name:
UHDMAnCONTROL, n in [1..7]
Access Type:
Read/Write
Offset:
(n - 1) * 0x10
Reset Value:
0x00000000
(just replace the IN endpoint term by OUT endpoint, and vice-versa)
31
30
29
28
27
26
25
24
CHBYTELENGTH[15:8]
23
22
21
20
19
18
17
16
CHBYTELENGTH[7:0]
15
14
13
12
11
10
9
8
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
BURSTLOC
KEN
DESCLD
IRQEN
EOBUFF
IRQEN
EOTIRQEN
DMAENDEN
BUFFCLOSE
INEN
LDNXTCHD
ESCEN
CHEN
Содержание AT32UC3A3128
Страница 61: ...61 32072H AVR32 10 2012 AT32UC3A3 PLLEN PLL Enable 0 PLL is disabled 1 PLL is enabled...
Страница 260: ...260 32072H AVR32 10 2012 AT32UC3A3 5 2560 3071 6 3072 3583 7 3584 4095 Bit Index n Sector Boundaries...
Страница 592: ...592 32072H AVR32 10 2012 AT32UC3A3 Manchester Configuration Register on page 614...
Страница 989: ...989 32072H AVR32 10 2012 AT32UC3A3 37 2 Package Drawings Figure 37 1 TFBGA 144 package drawing...
Страница 991: ...991 32072H AVR32 10 2012 AT32UC3A3 Figure 37 3 VFBGA 100 package drawing...