11
NET D<6>
LOC=P80;
NET D<7>
LOC=P10;
NET A<0>
LOC=P3;
# LOWER BYTE OF ADDRESS
NET A<1>
LOC=P4;
NET A<2>
LOC=P5;
NET A<3>
LOC=P78;
NET A<4>
LOC=P79;
NET A<5>
LOC=P82;
NET A<6>
LOC=P83;
NET A<7>
LOC=P84;
NET A<8>
LOC=P59;
# UPPER BYTE OF ADDRESS
NET A<9>
LOC=P57;
NET A<10>
LOC=P51;
NET A<11>
LOC=P56;
NET A<12>
LOC=P50;
NET A<13>
LOC=P58;
NET A<14>
LOC=P60;
NET WEB
LOC=P62;
# ACTIVE-LOW WRITE-ENABLE FOR ALL RAMS
NET OEB
LOC=P61;
# ACTIVE-LOW OUTPUT-ENABLE FOR ALL RAMS
NET CEB
LOC=P65;
# ACTIVE-LOW CHIP-ENABLE FOR XS40 RAM
NET LCEB
LOC=P7;
# ACTIVE-LOW CHIP-ENABLE FOR LEFT XSTEND RAM
NET RCEB
LOC=P8;
# ACTIVE-LOW CHIP-ENABLE FOR RIGHT XSTEND RAM
•
Listing 10:
Connections between the XStend RAMs and the XS95.
NET D<0>
LOC=P44;
# DATA BUS
NET D<1>
LOC=P43;
NET D<2>
LOC=P41;
NET D<3>
LOC=P40;
NET D<4>
LOC=P39;
NET D<5>
LOC=P37;
NET D<6>
LOC=P36;
NET D<7>
LOC=P35;
NET A<0>
LOC=P75;
# LOWER BYTE OF ADDRESS
NET A<1>
LOC=P79;
NET A<2>
LOC=P82;
NET A<3>
LOC=P84;
NET A<4>
LOC=P1;
NET A<5>
LOC=P3;
NET A<6>
LOC=P83;
NET A<7>
LOC=P2;
NET A<8>
LOC=P58;
# UPPER BYTE OF ADDRESS
NET A<9>
LOC=P56;
NET A<10>
LOC=P54;
NET A<11>
LOC=P55;
NET A<12>
LOC=P53;
NET A<13>
LOC=P57;
NET A<14>
LOC=P61;
NET WEB
LOC=P63;
# ACTIVE-LOW WRITE-ENABLE FOR ALL RAMS
NET OEB
LOC=P62;
# ACTIVE-LOW OUTPUT-ENABLE FOR ALL RAMS
NET CEB
LOC=P65;
# ACTIVE-LOW CHIP-ENABLE FOR XS95 RAM
NET LCEB
LOC=P6;
# ACTIVE-LOW CHIP-ENABLE FOR LEFT XSTEND RAM
NET RCEB
LOC=P7;
# ACTIVE-LOW CHIP-ENABLE FOR RIGHT XSTEND RAM
Summary of Contents for XStend XS40
Page 17: ...16 Figure 5 Programmer s model of the XS40 XStend Board combination...
Page 18: ...17...
Page 20: ......
Page 31: ......
Page 33: ......
Page 41: ......
Page 58: ...Appendix A XStend Schematics...
Page 59: ...XStend V1 3 XS Board Connectors...
Page 60: ...XStend V1 3 RAM...
Page 61: ......
Page 62: ...XStend V1 3 Stereo Codec...
Page 63: ......