Supero SUPER P6SLA, User'S And Bios Manual

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BIOS User's Manual
5-12
PIIX4 SERR#
Use this feature for the SERR# generation due to delayed trans-
action time-out enable. The settings are: Disabled or Enabled.
USB Passive Release Enable
The settings for this option are: Disabled or Enabled. When set
to Enabled, it allows the PIIX4 to use Passive Release while
transferring control information or data for USB transactions.
When Disabled, PIIX4 will perform PCI accesses for USB without
using Passive Release.
PIIX4 Passive
Use the PIIX4 Passive feature to enable the Passive Release
mechanism encoded on the PHOLD# signal when PIIX4 is a PCI
master. The settings are: Disabled or Enabled.
PIIX4 Delayed Transaction
Use this feature to enable the Delayed Transaction mechanism
when the PIIX4 is the target of a PCI transaction. The settings
are: Disabled or Enabled.
Master Lat. Timer
Master Latency Timer is an 8-bit register that controls the amount
of time the PAC, as a PCI bus master, can burst data on the PCI
bus. The count value is an 8 bit quantity. However, MLT[2:0] are
0 when determining the count value. The PAC's MLT is used to
guarantee to the PCI agents (other than PAC) a minimum amount
of the system resources. Note: Settings are in increments with an
Optimal and Fail-Safe default setting of 40H.
MTT
Multi-Transaction Timer is an 8-bit register that controls the
amount of time that the PAC's arbiter allows a PCI initiator to
perform multiple back-to-back transactions on the PCI bus. The
PAC's MTT mechanism is used to guarantee the fair share of the
PCI bandwidth to an initiator that performs multiple back-to-back
transactions to fragmented memory ranges (and as a conse-
quence it cannot use long burst transfers). Note: Settings are in
increments with an Optimal and Fail-Safe default setting of 20H.