
17 January, 2003
IEEE1394 INTERFACE
6-91
D
etailed
D
escr
iptions
6.12.3 BLOCK DIAGRAM
•
PHY: Physical layer control device
•
Link: Link layer control device
•
EEPROM: 256-byte ROM
6.12.4 PIN ASSIGNMENT
Pin No.
Signal Description
1 Cable
Power
2 GND
3 Receive
strobe
4 Transmit
data
5 Receive
data
6 Transmit
strobe
IEEE1394 Board
1394 I/F
1394 I/F
PHY
TSB41AB2
Clock
Oscillator
Link
TSB12LV23A
EEPROM
O
p
tio
n
I/F
(C
N
4)
PC
Controller Board
G080D974.WMF
Pin 1
Pin 6
G080D975.WMF
Pin assignment
Pin 1
Pin 4
Pin 2
Pin 3
Pin 5
Pin 6