EPC-7 Hardware Reference
5. Theory of Operation...........................................................................................25
Memory Map ....................................................................................................26
Processor and Memory .....................................................................................27
Cached and Uncached Addresses.............................................................27
ROM and ROM Shadowing..............................................................................27
SCSI Controller.................................................................................................28
Floppy Disk Controller .....................................................................................28
IDE Disk Interface ............................................................................................29
Battery...............................................................................................................29
Watchdog Timer ...............................................................................................30
EXM Expansion Interface.................................................................................31
VXIbus Interface...............................................................................................31
Slot 0 and System Controller Functions ...........................................................32
Reset Behavior ..................................................................................................32
Printed Circuit Board ........................................................................................34
6. Connectors ..........................................................................................................35
VXI Signal Usage .............................................................................................38
Floppy Connector .............................................................................................42
7. VXIbus Interface ................................................................................................43
Concepts............................................................................................................43
Memory Map ............................................................................................43
Direct VMEbus Accesses .........................................................................44
Byte Ordering ...........................................................................................45
Slave Accesses from the VMEbus ...........................................................48
Self Accesses Across the VMEbus...........................................................48
Read-Modify-Write Operations ...............................................................49
VMEbus Interrupt Response ....................................................................50
Registers Specific to EPC-7..............................................................................50
Register State after Reset..........................................................................66
VXIbus Mapped Registers ................................................................................67
Supported Address Modifiers ...........................................................................68
Low-Level Programming the VMEbus Interface .............................................68
VMEbus Accesses....................................................................................68
VXIbus Interrupt Handler .................................................................................71
Read-Modify-Write Operations ...............................................................74
Soft Reset and VME Sysreset ...........................................................................74
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