
EPC-7 Hardware Reference
Memory Map
The 2
32
byte physical address space seen by the CPU is mapped according to the
following table.
5
5
Range
Content
00000000 0009FFFF DRAM
000A0000 000BFFFF Uncommitted, mapped to EXM expansion interface
(typically, with a VGA video controller EXM installed,
0A0000-0BFFFF will be the video RAM and 0C0000-
0C7FFFF will be the video BIOS)
000C0000 000CFFFF DRAM (see bit MDCF in memory mode register)
000D0000 000DFFFF Uncommitted, mapped to EXM expansion interface
000E0000 000EFFFF Mappable window onto VXI data transfer bus or
uncommitted, mapped to EXM expansion interface,
controlled by bit in register 8102h
000F0000 000FFFFF
DRAM (used for BIOS shadowing)
Write-protected.
00100000 00FDFFFF DRAM or EXM expansion interface (to DRAM to the
extent of the value of MEMS in the memory mode
register)
00FE0000 00FFFFFF
Mapped to BIOS ROM or DRAM (see bit MDFF in
memory mode register)
01000000 03FFFFFF
DRAM or EXM expansion interface (see bit MEMS in
the memory mode register)
04000000 0FFFFFFF Mapped to EXM expansion interface
10000000 EFFFFFFF Mapped to VXIbus
F0000000 FFFFFFFF Mapped to EXM expansion interface. On the EXM
expansion interface, ranges xxFExxxx and xxFFxxxx are
ROM.
Table 5. Physical Address Space Mapping.
Little-endian and big-endian byte ordering is discussed in Chapter 7,
VXIbus
Interface
.
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