3162A/B User Manual
Getting Started 1-12
Synthesizer Agility
The Model 3162B is capable of frequency hopping, FSK modulation, and clock
rate switching between memory segments. Frequency hopping is controlled
from three different sources: front-panel 9 pin D-sub connector, front panel
trigger input, and VXIbus trigger lines. The ratio between two frequencies is an
integer number from 1 to 65536. The Model 3162B can hop between 256 pre-
determined frequencies.
In FSK modulation mode, the instrument outputs a carrier frequency as long
as the control signal remains false. When the FSK control turns true, the
generator outputs a shifted frequency signal which is an integer division of the
carrier frequency. Frequency divider ranges from 1 to 65536.
In sequenced mode, clock frequency dividers may be assigned to each
segment. The default divider is 1, while the maximum division ratio is 65536.
The division ratio is stored in the clock divider segment assignment table.
Every time a sequence runs, the clock rate is switched automatically and
coherently to the assigned clock divider.
Output State
The main output can be turned on or off. The internal circuit is disconnected
from the output BNC connector by a mechanical switch (relay). This feature is
useful for connecting the Model 3162B main output, along with other
instruments, to an analog bus. For safety reasons, when power is first applied
to the chassis, the main output is always off.
Amplitude
Modulation
The Model 3162B may be amplitude modulated with an external signal. The
amplitude modulation input accepts the envelope signal, while the carrier signal
can be selected from any of the standard, user, or even sequenced waveforms.
The frequency of the modulating signal ranges from DC to over 1 MHz. Each
channel has separate amplitude modulation input.
Front-Panel /
VXIbus PLL
Multiple Model 3162B s may be synchronized and operated together inside
one VXIbus chassis. With one instrument configured as master and the rest
of the instruments configured as slaves, the instruments are phase-locked to
the start phase of the master module. Slave modules can be configured to have
phase offsets from 0
°
to +360
°
. There is no need to install multiple Model
3162B modules into adjacent slots to phase synchronize modules.
The reference signal can be applied either to the front panel reference input or
placed by one of the modules on one of the backplane trigger lines. This way,
the same reference can be applied to all slave modules to generate phase-
related signal patterns. The reference signal for the PLL function, when applied
to the TRIG IN connector, shares the same characteristics as the trigger input:
programmable trigger level and programmable slope.
When placed in PLL mode, the Model 3162B monitors the TRIG IN connector
for valid signals. Once sensed, the Model 3162B measures the signal’s
Summary of Contents for 3162A/B
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