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User Manual 3162A/B
Getting Started 1-7
Channel A
modulate the channel A main output frequency. The phase modulation function
operates in conjunction with the PLL function. The AM/PM input becomes
active when one of these functions is selected.
AM Input - Channel B
The channel B AM input accepts signals that amplitude modulate the channel
B main output signal. The AM input becomes active when one of these
functions is selected.
Reference Clock
Input
The reference clock input accepts a 10 MHz, TTL level signal to replace the
CLK10 reference. The reference clock input is active only when selected.
Frequency/
Segment Control
Input
The frequency and segment control input is a 9-pin, D-Sub type connector.
Eight pins are used as control lines and one pin (pin 9) is connected to ground.
The binary combination of pins 1 through 8 may be used to control 256 different
frequency dividers, or 256 different segments. A frequency divider table and/or
a segment table must first be loaded into the instrument before this input can
modify the output. The signal level for this connector is TTL.
Operating Modes
The Model 3162B can be programmed to operate in one of four operating
modes: continuous, triggered, gated and counted burst. These modes are
described below.
Continuous Mode
In normal continuous mode, the selected waveform shape is output
continuously at the selected frequency, amplitude and offset.
Triggered Mode
In triggered mode, the Model 3162B circuits are armed to generate one output
waveform. The trigger circuit is sensitive to transitions at the trigger input.
Select between positive or negative transitions to trigger the instrument. You
may also program the trigger level to the desired threshold level. When
triggered, the generator outputs one waveform cycle and remains idle at the
last point of the waveform. The Model 3162B can be armed to receive a trigger
signal from a front panel BNC connector, a VXI backplane TTLTRG<n> or
ECLTRG0, or from an internal, programmable trigger generator.
The trigger signal, whether it comes from the front panel or from the VXIbus,
has to pass through some electrical circuits. These circuits cause a small
delay known as system delay. System delay cannot be eliminated completely.
It is, however, minimized in the Model 3162B to approximately 100 ns
maximum. System delay is a factor that must be considered when applying a
trigger signal. It defines how long it will take from a valid trigger edge to the
moment that the output reacts.
While system delay has a fixed value that cannot be controlled, the Model
3162B offers a controllable trigger delay parameter. When operated, delay from
Summary of Contents for 3162A/B
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