EPAQ-9410
Hardware Programming Reference 0.16
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Copyright © 2019 QEI
Page 22
Access type: write-only
3
2
1
0
CH[14,15]_SEL
The CH[14,15]_SEL registers control the configuration of the Bell 202 MODEM ports 1
and 2. Modem ports 1 and 2 are also known as CH14 and CH15.
The table below summarizes supported values for CH[14,15]_SEL field.
Value
Description
0x0
MODEM disabled, PTT is not asserted
0x1
MODEM is controlled by a DUART channel, (MODEM 1 is always
controlled by DUART CH A, MODEM 2 is always controlled by CH B)
PTT, M0, M1 are controlled by DUART’s RTS#.
When RTS# is asserted M0=1, M1=0 and PTT is asserted. When RTS# is de-
asserted, M0=0, M1=1 and PTT is de-asserted.
0x2
MODEM is controlled by a Bit-Bang channel, (MODEM 1 is always
controlled by the Bit-Bang CH 0, MODEM 2 is always controlled by the Bit-
Bang CH 1). PTT, M0, M1 are controlled by BB[0,1]_RTS# signal. When
RTS# is de-asserted, M0=0, M1=1 and PTT is de-asserted.
0x4
debug/test mode, MODEM is controlled by TELCO_[1,2]_CTRL register
0x3, 0x5-
0xF
reserved for future use, same as 0x0
3.10.9 Telco [1,2] Control Register
Register Name: CH[14,15]_CTRL
Address: [14]: 0xB402_0009, [15]: 0xB402_000B
Access type: write-only
3
2
1
0
CH[14,15]_SEL
The CH[14,15]_CTRL registers control signals related to the Bell 202 MODEM ports 1
and 2 when the CH[14,15]_SEL is set to 0x04.
3.10.10 RS232 Port [1,2] Mode Register
Register Name: CH[10,11]_SEL
Address: [10]: 0xB402_000C, [11]: 0xB402_000D
Access type: write-only
3
2
1
0
RS232_MODE
The CH[10,11]_SEL registers control the configuration of the RS232 ports 1 and 2. The
RS232 ports 1 and 2 are also known as CH10 and CH11.
