QEI ePAQ-9410, User Manual

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EPAQ-9410 Hardware Programming Reference 0.16
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Copyright © 2019 QEI
Page 17
QUAD UART 1, Channel B /dev/sttyS1 GPIO_2_0
QUAD UART 1, Channel C /dev/sttyS2 GPIO_2_1
QUAD UART 1, Channel D /dev/sttyS3 GPIO_2_2
QUAD UART 2, Channel A /dev/sttyS4 GPIO_2_3
QUAD UART 2, Channel B /dev/sttyS5 GPIO_2_4
QUAD UART 2, Channel C /dev/sttyS6 GPIO_2_5
QUAD UART 2, Channel D /dev/sttyS7 GPIO_2_6
3.9 DUART
SC28L92A1B
Configured for Intel bus format
CH10_TXCLK_OUT – OP2
CH10_RXCLK_IN - IP4
CH11_TXCLK_OUT – OP3
CH11_RXCLK_IN - IP6
3.10 Serial Routing CPLD
Base address is at 0xB402_0000, 4-bit wide data bus, 5 address bits.
Offset Register Name Access Reset
0x00 IRIG-B Bus IRIG_SIGNAL_BUS_SEL write-only 0x0
0x01 IRIG_FIBER_TX IRIG_FIBER_TX_SEL write-only 0x0
0x02 IRIG-B_RS485_TXD IRIG_B_RS485_TXD_SEL write-only 0x0
0x03 IRIG-B_OUTPUT_TO_MICRO IRIG_B_OUTPUT_TO_MICRO_SEL write-only 0x0
0x04 unused
0x05 IRIG-B_MOD_OUT_EN_H IRIG_B_MOD_OUT_EN_H write-only 0x0
0x06 CH8_RXD CH8_RXD_SEL write-only 0x0
0x07 COM_EXP_IRIG-B COM_EXP_IRIG_B_SEL write-only 0x0
0x08 Telco 1 Mode CH14_SEL write-only 0x0
0x09 Telco 1 Control CH14_CTRL read-write
0x0A Telco 2 Mode CH15_SEL write-only 0x0
0x0B Telco 2 Control CH15_CTRL read-write
0x0C RS232 Port 1 Mode CH10_SEL write-only 0x00
0x0D RS232 Port 2 Mode CH11_SEL write-only 0x00
0x0E Bit-Bang CH 0 BB0_SEL
0x0F Bit-Bang CH 1 BB1_SEL
0x10 Bit-Bang 0 RTS# Control BB0_RTS_CTRL write-only 0x00
0x11 Bit-Bang 1 RTS# Control BB1_RTS_CTRL write-only 0x00
0x12 DUART A DUART_CHA_SEL write-only 0x00
0x13 DUART B DUART_CHB_SEL write-only 0x00
0x14 reserved
0x15 reserved
0x16 reserved
0x17 reserved
0x18 SR CPLD Revision 0 SR_REVISION_0 read-only 0x8
0x19 SR CPLD Revision 1 SR_REVISION_1 read-only 0x0
0x1A reserved
0x1B reserved
0x1C reserved
0x1D reserved
0x1E reserved