EPAQ-9410
Hardware Programming Reference 0.16
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Copyright © 2019 QEI
Page 20
{CH8_TXD, CH8_RTS_L};
0x7
CH8_DEBUG:
{IRIG_B_RS485_TXD, IRIG_B_RS485_DRV_EN_L} =
{CH8_TXD, 1'b0};
0x8-0xF
reserved/unused:
{IRIG_B_RS485_TXD, IRIG_B_RS485_DRV_EN_L} = {1'b0, 1'b1};
3.10.4 IRIG-B_OUTPUT_TO_MICRO Register
Register Name: IRIG_B_OUTPUT_TO_MICRO_SEL
Address: 0xB402_0003
Access type: write-only
3
2
1
0
IRIG_B_OUTPUT_TO_MICRO_SEL
The IRIG_B_OUTPUT_TO_MICRO_SEL register controls the configuration of the
IRIG-B_OUTPUT_TO_MICRO signal.
The table below summarizes supported values for the
IRIG_B_OUTPUT_TO_MICRO_SEL register.
Value
Description
0x0-0xF
reserved for future use, IRIG-B_OUTPUT_TO_MICRO =
IRIG_SIGNAL_BUS
3.10.5 IRIG-B_MOD_OUT_EN_H Register
Register Name: IRIG-B_MOD_OUT_EN_H
Address: 0xB402_0005
Access type: write-only
3
2
1
0
--
--
--
IRIG_B_MOD_OUT_EN_H
The IRIG_B_MOD_OUT_EN_H register controls the configuration of the IRIG-
B_MOD_OUT_EN_H signal. The IRIG-B_MOD_OUT_EN_H signal configures
COAX IRIG port J9 for IRIG-B input vs. IRIG-B output mode of operation.
IRIG_B_MOD_OUT_EN_H
0 – IRIG-B input mode
1 – IRIG-B output mode
3.10.6 CH8_RXD Register
Register Name: CH8_RXD_SEL
Address: 0xB402_0006
Access type: write-only