EPAQ-9410
Hardware Programming Reference 0.16
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Copyright © 2019 QEI
Page 12
3.6 SPI Flash
3 x SST25VF064C – 64 Mbit SPI Serial Dual I/O Flash.
3 x 8MBytes
3.7 Address Decoder CPLD
0xB400_0000-0xB5FF_FFFF 32 Mbytes WEIM CS4 for AD CPLD
A0-A8, 512 byte chunks
A16-A20, 32 chunks of 64K
Start
End
Size
Description
0xB400_0000
0xB400_01FF
512 bytes
QUAD UARTs, DUART
0xB401_0000
0xB401_01FF
512 bytes
Address Decode CPLD_CS_1
0xB402_0000
0xB402_001F
32 bytes
Serial Routing CPLD
0xB403_0000
0xB403_01FF
512 bytes
Address Decode CPLD
0xB404_0000
0xB405_FFFF
128 KBytes
NVRAM_CS#, NVRAM
0xB406_0000
0xB406_FFFF
64 KBytes
reserved for future use
0xB407_0000
0xB407_FFFF
64 KBytes
reserved for future use
0xB408_0000
0xB408_00FF
256 Bytes
LED Monitor CPLD
0xB409_0000
0xB409_0000
reserved for future use
0xB40A_0000
0xB40A_0000
reserved for future use
0xB40B_0000
0xB40B_0000
reserved for future use
0xB40C_0000
0xB40C_0000
reserved for future use
0xB40D_0000
0xB40D_0000
reserved for future use
0xB40E_0000
0xB40E_0000
reserved for future use
0xB40F_0000
0xB40F_0000
reserved for future use
0xB410_0000
0xB410_0000
reserved for future use
…
…
…
0xB41F_0000
0xB41F_0000
reserved for future use
Register summary at 0xB401_0000
Offset
Register
Name
Access
Reset
0x0B
RS232 Port 1 PTT
CH10_PTT_H
write-only
0x00
0x0C
RS232 Port 2 PTT
CH11_PTT_H
write-only
0x00
0x0D
DISABLE_COMM_EXP_H
DISABLE_COMM_EXP_H
write-only
0x0E
COM_EXP_BRD_DETECT#
COM_EXP_BRD_DETECT#
read-only
0x0F
Heartbeat LED
HEARTBEAT_L
write-only
0x01
0x10
L1 LED
LED_1
write-only
0x01
0x11
L2 LED
LED_2
write-only
0x01
0x12
L3 LED
LED_3
write-only
0x01
0x13
L4 LED
LED_4
write-only
0x01
0x14
DISABLE_2_H
DISABLE_2_H
write-only
0x00
0x15
DISABLE_3_H
DISABLE_3_H
write-only
0x00
0x16
MSTR_RS422_TXEN
MSTR_RS422_TXEN
write-only
0x00
0x17
BIT_BANG_RS232_ENA
BIT_BANG_RS232_ENA
write-only
0x00
0x18
AD CPLD Revision
AD_REVISION
read-only
0x07
0x19
ETHER_CONFIG_MODE
ETHER_CONFIG_MODE
write-only
0x1A
ETHERNET_CPLD_RESET#
ETHERNET_CPLD_RESET#
write-only