Panasonic Panafax DX-2000, Service Manual

Page: 270 / 322

270
6.2.16.2. LAN Controller
1. LAN Controller (IC1)
This conforms to IEEE 802.3 Ethernet Controller.
The CPU bus is directly connected and the data interrupt is controlled by IRQ 0. The 20 MHz clock is supplied by OSC 1.
The LAN Controller for the system timing clock divides the frequency provided from OSC 1 into 10 MHZ clock. The clock
signal is also supplied for the Manchester encoding/decoding circuit for data conversion. The LAN controller contains a built
in 6 KByte RAM for transmission and reception buffer.
2. EEPROM (IC13)
This memory stores the configuration registers and MAC (Media Access Control) address for the LAN controller. Data is
transferred to LAN controller (serial transfer) when the power is turned "On". The MAC address for the LAN controller
represents the location on the LAN.
3. Filter Transformer (IC2)
A choke module transformer with a low-pass Butterworth filter.
The output TX signal from the LAN controller is differentiated and transmitted on to the LAN via this module. Similarly, the
input RX signal (differential input pair) is terminated by an externally connected 100 ohms resistor and input to the LAN
controller via this module.
4. Ethernet Interface
Provides the 10Base-T Ethernet interface.
6.2.16.3. LED
1. LINK LED (LED1)
The LINK LED normally illuminates when the LAN cable is connected and when a link pulse is detected. Consequently, LED
can be used to determine whether the 10Base-T cable has become disconnected (RX side).
2. Activity LED (LED2)
This LED illuminates when reception data is present on the LAN. (The LED also illuminates when reception data for other
devices is present.)
LANC
PCB
Link, Activy
RX
CPU BUS
IC1
LAN Controller
LAN91C96
S
R
A
M
IC2
Filter
Transformer
IC13
EEPROM
TX
10Base-T
LINK
Activity
OSC1
20 MHz
RJ-45
Connector
INTERNET