Panasonic AJ-YA120AG, Service Manual

Page: 108 / 647

SGEN/SDI (AJ-YA120AG) BLOCK DIAGRAM
BLK-
12
SD REF H, SD FRM, SD CF
REF IN
REF THRU
BB
SYNC
SEPA
BB
SEPA
4FSC
SYNC
GEN
SD SYNC
BST
13.5M
NTSC
4fsc
PAL
4fsc
EXT_SD_H,FRM,CF
PAL_CK_13M
4Fsc_CK
27M
VCXO
27.027M
VCO
DA
SYS_27M
74.17M
VCXO
74.25M
VCXO
HD_74M
BUFF
HD REF
CLK74 [0],[1]
SD
27M
REF
PLL
CNT
HD
74M
REF
PLL
CNT
HD REF CLK,
FRM
59/60 TRI
SYNC
SEPA
MMV
AMP
SD REF CLK,
FRM
HD REF H, HD FRM
SGEN
PIO
HD59_REF_DET H
EXT_HD59_V
EXT_HD59_H
MMV
MMV
SYNC
SEPA
EXT_REF
MMV
BUFF
EVR DATA
EVR LD H
EVR CLK
SD REF CLK27
BUFF
BUFF
18 A3
A/B42-45 A/B42-45
DEC FS, FS64, FS256
ROUNDING
EE THRU
SDI OUT AUD (CH1~CH8)
SDI PB HD DATA
SD ENC
SD_SDI_OUT
SDI PB SD DATA
SDI PB CLK27
MUTE
A DLY
CH SELECT
SYS H
CNTRL
SYS H
CNTRL
SYS H
SYSH
CHAR
ADD
CHAR GATE, DATA
CHAR
ADD
DLY
DLY
SD_SDI_OUT_
A56 A53
A/B54,
B55
B53,
AB54
A/B53 A/B52
A71, 72 A/B71
A/B76-79 A/B76-79
A/B56,
B55
A/B21,
A22
A/B47-51 A/B47-51
A/B61,62 A/B23,24
A/B54 B57,58
B63 B63
EQ S/P
HD DEC
HD SDI IN
J3
THRU OUT
J4
VCO
DRIVE
Q2-5
L4, 5, IC3
X1
IC6
IC5
IC200<3>
DRIVE
&
BUFF
S/P
HD ENC
HD SDI OUT 1
VCO
X1
IC6
IC5 Q1-7
J2
J3
J4
J5
HD SDI OUT 2
HD SDI OUT 3
HD SDI OUT 4
A/B17,18 AB57,58
B15 B55
P/S &
DRIVE
MUTE
EXT REF
SDI DEC AUD (CH1-8)
SDI IN FS256
SDI REC HD DATA
HD SDI RX CIRCUIT
HD SDI TX CIRCUIT
IC613<7>
J700
J701
IC700<8>
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P2P700
P2 P600
P4102
BUFF
Q100-103
IC101<2>
IC109<2>
IC103,105<2>
X300<4>
X301<4>
X302<4>
IC320<4>
IC311<4>
IC613<7>
IC508<6>
IC503<6>
X501<6>
X500<6>
IC506<6>
IC506<6>
IC506<6>
IC403<5>
X400<5>
X401<5>
IC406<5>
IC405<5>
IC112<2>
IC104<2>
IC102<2> IC108<2>
IC119<2>
IC106<2>
IC104<2>
AMP
IC502<6>
P4001
P1
P4001
P1
P1
P1
P1
P1
P1
P1
P4001
P1
TO APROC
CIRCUIT
TO REC/PB
CIRCUIT
TO REC/PB
CIRCUIT
FROM REC/PB
CIRCUIT
FROM VOUT/SYS
CIRCUIT
FROM APROC
CIRCUIT
FROM VOUT/SYS
CIRCUIT
FROM APROC
CIRCUIT
V JACK CIRCUIT
BUFF
IC604<7>