3. USING THE DIGIBASE-E
19
Figure 10. digiBASE-E ADC Tab.
The Lower Level Discriminator
sets the level of the lowest ampli-
tude pulse that will be stored. This
level establishes a lower-level
cutoff by channel number for ADC
conversions.
The Upper Level Discriminator sets
the level of the highest amplitude
pulse that will be stored. This level
establishes an upper-level cutoff by
channel number for storage.
3.1.3.1. Gate
The digiBASE-E supports eight
gate modes, but only six are useful
within MAESTRO and ScintiVision (the others require customer-written software).
!
None — No gating is performed; all detector signals are processed.
!
Acq Control — Once software initiates the data acquisition process, the actual data
acquisition is in effect as long as the A input signal is high. The B output can be used to
control a sample changer.
AcqTrigger — Once software initiates the data acquisition process, actual data acquisition
does not start until the Input A signal transitions from low to high. Data acquisition
continues until stopped by software.
!
CoincGate — When Input A is low, real time and live time operate normally, but no counts
are stored in memory. When Input A is high, normal acquisition occurs.
!
EventCounter — Input A acts as a 32-bit (rising-edge) event counter for LVTTL pulses.
The contents of the counter can be moni tored on the Status tab (Section 3.1.7). To clear the
counter, click on the Clear Spectrum button on the MAESTRO toolbar or issue
Acquire/Clear.
!
Routing — If Input A is high, the spectrum histogram data are routed to an alternative data
memory. Otherwise the data are handled as a regular spectrum histogram. Currently, there
are two ways to access the data in the alternative data memory; these are discussed in
Section 2.2.
Summary of Contents for digiBASE-E
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