Omron SYSMAC C200H-IDS01-V1, Operation Manual

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Appendix D
Using the C200H ID Sensor Unit with
CS1-series PCs
Points of Caution
Note the following points when using the C200H-IDS01-V1 or C200H-IDS21 with a CS1-series PC.
1) Differences in I/O Bit and DM Area Allocation
• The beginning word, n, of the area allocated for I/O between the CPU Unit and the ID Sensor will change
from n = 100 + (unit number
×
10) to n = 2000 + (unit number
×
10).
• The beginning word, m, of the area in the DM Area allocated to the ID Sensor will change from m = DM
1000 + (unit number
×
100) to m = (unit number
×
100).
2) Command Storage Area and Read Data Receiving Area Specification
Specify the command storage area and read data receiving area for a CS1-series PC using the CIO Area
(words n+2 and n+3) in the way shown below.
Command Storage Area/Read Data Receiving Area Specification
Note It is not possible to specify any CS1 memory address other than the ones given in the above table.
Data Configuration
CIO Area
n = 2000 + (unit number
×
10)
Area Address to be
specified
(see note)
Specification method from CIO Area
Command data storage area
address
Read data receiving area address
Area name
n+2, bits 12 to 15
(1 digit, Hex)
Beginning word
number
n+2, bits 0 to 11
(3 digits, BCD)
Area name
n+3, bits 12 to 15
(1 digit, Hex)
Beginning word
number
n+3, bits 0 to 11
(3 digits, BCD)
General-purpose
DM Area D00000 to
D00999 0 0000 to 0999 0 0000 to 0999
DM Area for
Special I/O Units D20000 to
D20999 1 0000 to 0999 1 0000 to 0999
I/O Area 0000 to 0246 2 0000 to 0246 2 0000 to 0246
Holding Area 1 H000 to H099 4 0000 to 0099 4 0000 to 0099
Holding Area 2 H107 to H122 6 0007 to 0022 6 0007 to 0022
Data Link Area 1000 to 1063 8 0000 to 0063 8 0000 to 0063
Timer Completion
Flags T0000 to T0511 A 0000 to 0511 A 0000 to 0511
15 0 Contents Direction
Command execution flags, command
data storage specification, read data
destination specification, etc.
ID busy, Waiting for Data
Carrier, command error, etc.
Commands from
the CPU Unit
ID Sensor Unit status
Bit
From CPU Unit
to ID Sensor Unit
From ID Sensor
Unit to CPU Unit
n to n+3
n+4