303
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 (
µ
PD78054 Subseries)
Notes 1. Bit 6 (COI) is a read-only bit.
2. Can be used as P25 (CMOS input/output) when used only for transmission.
3. Be sure to set WUP to 0 when the 3-wire serial I/O mode is selected.
Remark
×
: don’t care
PM
××
: Port mode register
P
××
: Port output latch
<6>
<5>
4
3
2
1
0
<7>
Symbol
CSIM0
CSIM01
0
1
Serial Interface Channel 0 Clock Selection
Input Clock to SCK0 pin from off-chip
8-bit timer register 2 (TM2) output
0
SBI mode (See section 16.4.3, “SBI mode operation”.)
R/W
1
Clock specified with bits 0 to 3 of timer clock select register 3 (TCL3)
CSIM
04
0
CSIM00
×
0
1
FF60H 00H R/W
Note 1
Address After Reset R/W
R/W
CSIM
03
CSIM
02
PM25 P25 PM26 P26 PM27 P27
Operation
Mode
Start Bit
SIO/SB0/P25
Pin Function
SO0/SB1/P26
Pin Function
SCK0/P27
Pin Function
×
1
0
WUP
0
1
Wake-up Function Control
Interrupt request signal generation with each serial transfer in any mode
Interrupt request signal generation when the address received after bus release
(when CMDD = RELD = 1) matches the slave address register (SVA) data in SBI mode
R/W
1
MSB
LSB
1
×
0
0
0
1
Note 2
3-wire serial
l/O mode
SI0
(Input)
SO0
(CMOS output)
SCK0 (CMOS
input/output)
2-wire serial I/O mode (See section 16.4.4, “2-wire serial I/O mode operation”.)
1
1
Note 2
Note 3
Note 2
CSIE0
0
Serial Interface Channel 0 Operation Control
Operation stopped
Operation enabled
R/W
1
CSIE0 COI
WUP
CSIM04 CSIM03 CSIM02 CSIM01 CSIM00
Summary of Contents for PD78052
Page 2: ...2 MEMO ...
Page 8: ...8 MEMO ...
Page 16: ...16 MEMO ...
Page 36: ...36 MEMO ...
Page 158: ...158 MEMO ...
Page 174: ...174 MEMO ...
Page 240: ...240 MEMO ...
Page 260: ...260 MEMO ...
Page 340: ...340 MEMO ...
Page 392: ...392 MEMO ...
Page 438: ...438 MEMO ...
Page 482: ...482 CHAPTER 20 REAL TIME OUTPUT PORT MEMO ...
Page 510: ...510 MEMO ...
Page 524: ...524 MEMO ...
Page 560: ...560 MEMO ...
Page 576: ...576 MEMO ...
Page 598: ...598 MEMO ...
Page 602: ...602 MEMO ...