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CHAPTER 17 SERIAL INTERFACE IIC0 (
µ
PD780344Y, 780354Y SUBSERIES ONLY)
User’s Manual U15798EJ2V0UD
17.5.5 Stop condition
When the SCL0 pin is at high level, changing the SDA0 pin from low level to high level generates a stop condition.
A stop condition is a signal that the master device outputs to the slave device when serial transfer has been
completed. The slave device includes hardware that detects stop conditions.
Figure 17-13. Stop Condition
H
SCL0
SDA0
A stop condition is generated when bit 0 (SPT0) of IIC control register 0 (IICC0) is set (1). When the stop condition
is detected, bit 0 (SPD0) of IIC status register 0 (IICS0) is set (1) and INTIIC0 is generated when bit 4 (SPIE0) of
IICC0 is set (1).