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CHAPTER 5 CLOCK GENERATOR
User’s Manual U15798EJ2V0UD
5.5.2 Subsystem clock operations
When the system operates on the subsystem clock (with bit 5 (CLS) of the processor clock control register (PCC)
set to 1), the following operations are carried out.
(a) The minimum instruction execution time is either of the following, depending on the setting of the subclock
select register (SSCK).
•
122
µ
s: at 32.768 kHz operation
•
30.5
µ
s: with 32.768 kHz multiplied by 4
The setting does not depend on the bits 0 to 2 (PCC0 to PCC2) of PCC.
(b) Watchdog timer counting stops.
Caution Do not execute the STOP instruction while the subsystem clock is operating.
