Mitsubishi QJ71GP21-SX, Reference Manual

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- 23 7.5 Cyclic Data Retention Time for System Switching in Redundant System
7
PROCESSING TIME
(2) Cyclic data retention time in the case of a stop error of the control
system CPU, execution of a system switching instruction, system
switching from GX Developer, or system switching request from another
network
* 1 For details, refer to the following manual.
QnPRHCPU User's Manual (Redundant System)
Th = Tsw + SS [ms]
Th: Cyclic data retention time
Tsw: System switching time of Redundant CPU
*1
SS: Sequence scan time of Redundant CPU
*1
Figure 7.6 Cyclic data retention time
1
0) 1)
2
3
4 5
2) 3)
4)
0) 1) 2)
3)
4)
System A
CPU scan time
Data sent from
station No.1 to
another station
System A
System B
System B
CPU scan time
Data sent from
station No.2 to
another station
Data received
at another
station from
station No.1 or 2
Control system
Control system
Standby system
Standby system
System switching time
Cyclic transmission
delay time
Cyclic transmission delay time
Cyclic data retention time
Execution of system
switching instruction