SmartTime Static Timing Analyzer User Guide
122
Value
Description
external_removal
Set of paths from inputs to asynchronous pins
async_to_reg
Path from asynchronous pins to registers
-from_clock
clock_name
Displays a list of timing paths for an inter-clock domain set belonging to the source clock specified. You
can only use this option with the -to_clock option, not by itself.
-to_clock
clock_name
Displays a list of timing paths for an inter-clock domain set belonging to the sink clock specified. You can
only use this option with the -from_clock option, not by itself.
-analysis
name
Specifies the analysis for the paths to be listed. The following table shows the acceptable values for this
argument.
Value
Description
maxdelay
Maximum delay analysis
mindelay
Minimum delay analysis
-index
list_of_indices
Specifies which paths to display. The index starts at 1 and defaults to 1. Only values lower than the
max_paths option will be expanded.
-format
value
Specifies the file format of the output. The following table shows the acceptable values for this argument:
Value
Description
text
ASCII text format
csv
Comma separated value file format
Examples
Note
: The following example returns a list of five paths:
puts [expand_path –clock { myclock } –type {reg_to_reg }]
puts [expand_path –clock {myclock} –type {reg_to_reg} –index { 1 2 3 } –format text]
See Also
list_paths
Summary of Contents for SmartTime
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