IDT I2C Interface
Revision 1.5
Integrated Device Technology, Inc.
CPS-16/12/8 User Manual
4 - 3
July 10, 2012
9. Note, registers that are only 8 bits wide will only load 8 bits of data from the EEPROM. The data for
subsequent registers will be every 8 bits.
10. The last two bytes of the register map represent the CRC for the image. For more information, see
.
A tabular view of this definition is displayed below.
Table 4.1 EEPROM Register Address Map
EEPROM
Address (byte
level addresses)
Bits
EEPROM Contents
Comments
0x0000
0:7
First byte of Version Number [0:7]
This value must be = 0xAA. The
two version bytes are used as an
early validation of the format of the
memory block. If the read value
from the EEPROM does not equal
0xAA the read configuration
sequence will be terminated.
0x0001
0:7
Second byte of Version Number
[8:15]
This value must be = 0xAA.
0x0002
0:7
First byte of a 16-bit value that
defines the total number of
configuration blocks to read [0:7]
-
0x0003
0:7
Second byte of a 16-bit value that
defines the total number of
configuration blocks to read [8:15]
For n configuration blocks, the
value entered here is n-1
0x0004
0:7
The lower 8 bits of a 10-bit value
that defines the number of words in
configuration Block 1.
Represents bits [0:7] of the 10-bit
block count. For m words, the value
entered here is m-1.
0x0005
0:1
Bits 8:9 of the 10-bit block count
-
0x0005
2:7
Bits 0:5 of the block address
-
0x0006
0:7
Bits 6:13 of the block address
-
0x0007
0:7
Bits 14:21 of the block address
Bits 22:23 are zero.
0x0008:0x000B
All
Bits 0:31 of the data to load into
EEPROM address, 0x0005 to
0x0007
-
0x000C:0x000F
All
Bits 0:31 of the data to load into the
above a 1
-
...
...
Remainder of block 1
-
n
0:7
The lower 8 bits of a 10-bit value
that defines the number of words in
configuration Block 2.
Represents bits [0:7] of the 10-bit
block count. For m words, the value
entered here is m-1.
n + 1
7:6
Bits 8:9 of the 10-bit block count
-
n + 1
2:7
Bits 0:5 of the block address
-
