Revision 1.5
Integrated Device Technology, Inc.
CPS-16/12/8 User Manual
10 - 1
July 10, 2012
Chapter 10
CPS Registers
10 REGISTERS
The register file is addressable through I
2
C, JTAG, and any RapidIO port and is built with 22-bit addresses
and 32-bit words, as specified by the RIO spec. All unused address space is to be considered RESERVED.
When writing to any RESERVED address, no error is reported, and nothing happens. A read of any
RESERVED address will result in a response of all 0s. Attempting to write to port registers for non-existent
ports will also have no effect.
10.1 RAPIDIO COMPLIANCE
The CPS device support applicable Rapid IO specifications to the maximum extent possible. In general the
device supports the “Generic: All devices” requirements in the Rapid IO Interconnect Specification part 7:
System and Device Interpretability Specification. This requirement suggests support for a number of Rapid
IO specific registers. The CPS supports each of these registers except for the “Destination Operations
CAR”. Rapid IO Interconnect Specification part 1: Input/Output Logical Specification defines this register as
only being applicable to end points.
10.1.1 Interpretation of Reserved Register Bits
The CPS design is based on the RIO definition for the treatment of reserved register bits to support compat-
ibility with the existing PPS Gen 2 device (80KSW0001). This treatment is defined in Table 3-2 of the RIO
Common Transport Specification (Part 3). Under the “Target Behavior” column, the expected return of the
reserved bits of a register read is “logic 0” for all RIO defined registers. The CPS has extended this to defi-
nition to its “Implementation Defined Space” as well. Although the CPS device initializes with zeros in these
bits positions, it does not prevent the user from writing into these bits. The CPS design is based on the
expectation that the user will write zeros into reserved space when written to.
10.2 REGISTER TYPE FIELD DEFINITIONS
Table 10.1 Register Types
Type
Description
R/W
Both read and write from an external device are supported
RO
Read Only. These registers can not be written from an
external device
WO
Write Only. There registers can only be written from an
external device
RR
Reset on Read. These registers can only be read by exter-
nal devices and are reset when read.
FR
Fixed Read. The values in these registers are fixed and
can be only read from an external device.
W1R
Write Once Reset.
