IDT Error Management
Revision 1.5
Integrated Device Technology, Inc.
CPS-16/12/8 User Manual
5 - 10
July 10, 2012
5.1.2.4 Error Counter
The device provides an Error Counter. The user is capable, through use of the Special Error Filter Register,
to define which of 8 specific errors, when detected, will increment this counter. The Error Counter is a 16-
bit counter. If the counter reaches its maximum value (0xFFFF) it saturates and remains at its maximum
value until it is reset. The Counter resets when the Error Manager is reset, or the Error Counter bit in the
Error Reset Register is set.
5.1.2.5 Error Management Stop
The device provides the capability to stop the Error Manager. Through the Special Error Filter Register the
user is able the configure the Error Manager to stop if a specific error is detected.
The user is also able to stop the Error Manager by writing a logical 1 to the STOP_EM bit in the Error Reset
Register. The user must write a logical 0 to this same bit to enable the Error Management block to function
again.
Stopping the Error Manager freezes its operation such that all subsequent errors are blocked, dropped, and
not recorded.
5.1.2.6 Error Capability Register
The device provides additional support for stopping the Error Manager through the use of a Error Capability
Register.
Utilizing this register, the user is able to configure the device to set the STOP_EM bit in the Error Reset
Register if all 8 bits in the Error Flag Register are asserted (all 8) to subsequently stop the Error Manage-
ment function. A maintenance packet is generated and transmitted if this sequence occurs under these
configuration conditions.
Through the use of the Error Capability Register, the user is able to configure the device to set the
STOP_EM bit in the Error Reset Register when the Error Counter value reaches 0xFF, thus stopping the
Error Manager. A maintenance packet is generated and transmitted if this sequence occurs under these
configuration conditions.
5.1.2.7 Error Reset
The device provides an Error Reset Register which allows the user to reset the Error Flag Register, the
Error Counter, and or the Error Log. This register also provides the user the ability to configure the device to
enable and disable the generation and transmission of a maintenance packet. In addition, it provides the
user the capability to stop and restart the Error Manager.
5.1.2.8 Maintenance Packet Generation
The device supports the ability to generate and transmit a maintenance packet under the conditions
described in this chapter. Any of the errors defined in the 8 Special Error Filter Registers may cause the
device to generate and transmit a maintenance packet. The maintenance packet is generated only when a
filtered error causes the error handling module to take further actions, such as incrementing the error
counter, setting an error flag, generating a maintenance packet, or stopping Error Management operation.
The destination ID used with each transmitted maintenance packet is the value programmed by the user
into the RIO_PORT_WRITE_INFO register. In this manner, the user can set the CPS to send any gener-
ated maintenance packets to a host processor elsewhere in the system. This host processor is thus notified
of the error condition type, and can then invoke appropriate error recovery processes.
Each generated maintenance packet provides the following data: 1) the 6-bit Error Source, 2) the 8-bit error
Code, 3) the Error Flag Register contents (8-bits), and 4) the Error Counter Register value (16-bit).
Each maintenance packet type is a “port-write” packet as defined in the applicable RIO specifications and
will carry one 64-bit data word. It supports the following payload layout:
