Revision 1.5
Integrated Device Technology, Inc.
CPS-16/12/8 User Manual
ix
July 10, 2012
Introduction
This user reference manual includes hardware and software information for the CPS family products. It
applies to CPS-16, CPS-12, and CPS-8. The only deference is port number, device ID and register map file.
The pinout is covered in each individual datasheet. All the description through out the user manual is
default as CPS-16. The register file of CPS-12 and CPS-8 is a subset of CPS-16, the registers associated
with invalid port/quad are treated as reserved.
DEVICE ID: CPS-16 device ID is 0x35B, CPS-12 device ID is 0x35D, CPS-8 device ID is 0x35C.
PORT/QUAD NUMBER: CPS-16 has 4 QUAD provides up to 16 ports. CPS-12 has 3 QUAD pro-
vides up to 12 ports. CPS-8 has 2 QUAD provides up to 8 ports.
Content Summary
Chapter 1, “CPS Device Overview,”
provides a complete introduction to the capabilities of the CPS. It
includes the major difference from PPS device.
Chapter 2, “Serial RapidIO Ports,”
covers the device’s Serial RapidIO ports. These ports are RapidIO
specification 1.3 compliant. Also covers IDT specific features such as tracing
and filtering.
Chapter 3, “CPS Switch Description,”
covers the switch core behavior and flow control mechanism.
Chapter 4, “I
2
C Bus Interface,”
describes the standard I
2
C bus interface implemented on the CPS.
Chapter 5, “Error Management,”
explains the CPSs Error Management block. This block is responsible
for receiving, filtering, logging, counting, and responding to error reports from all of the functional blocks
within the device.
Chapter 6, “JTAG & Boundary Scan,”
describes the CPS JTAG interface and code.
Chapter 7, “Reference Clock,”
describes the reference clock requirement, system clock and SerDes clock
generation.
Chapter 8, “Programming the CPS,”
provides the basic configure steps and rules.
Chapter 9, “CPS Reset & Initialization”
provides reset and init steps
.
Chapter 10, “Registers”
provides the full memory map and complete listing of the CPS-16 registers,
register type, register fields, and their respective addresses
.
CPS-8 is a subset of CPS-16.
Chapter 11, “References,”
provides a list of all associated specifications referred to in this manual.
Documentation Conventions and Definitions
Throughout this manual the following conventions and terms are used:
To define the active polarity of a signal, signal names with and without overbars will be used. Signal
names with overbars are considered negative polarity or “active low” and are thus enabled when a
low voltage is applied.
To define buses, the most significant bit (MSB) will be on the left and least significant bit (LSB) will
be on the right. No leading zeros will be included.
To represent numerical values, either decimal, binary, or hexadecimal formats will be used. The
binary format is as follows: 0bDDD, where “D” represents either 0 or 1; the hexadecimal format is
as follows: 0xDD, where “D” represents the hexadecimal digit(s); otherwise, it is decimal.
Unless otherwise denoted, a byte will refer to an 8-bit quantity. A word will refer to a 32-bit quantity,
and a double word will refer to an 8 Byte (64-bit) quantity. This is in accordance with RapidIO con-
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