IDT Programming the Device
Revision 1.5
Integrated Device Technology, Inc.
CPS-16/12/8 User Manual
8 - 12
July 10, 2012
8.3.6 Quad Configuration (PHY Layer)
The physical layer ports on the CPS are next to be programmed. Doing so establishes the port configura-
tion, and the CPS’s response to sRIO reset control symbols. This functionality is controlled through three
main register sets:
CPS Control Registers
–
This register dictates whether the CPS is completely reset, or just the port is reset upon receipt of
an sRIO reset control symbol.
Quad Control Registers
–
This register defines the behavior of a given quad (4 logically-grouped lanes). This includes
enabling / disabling, setting the port speed, drive strength and pre-emphasis levels, and forcing a
reset of the PLLs among others. This register dictates how the CPS’s ports are physically enabled,
and logically enumerated.
–
In standard Quad configuration, the PLL_reset bit 10 and 11 both must be the same value.
Program to “00” for reset and “11” to deassert reset. In the enhance mode, bit 10 and 11 can
operate independently. During the PLL_reset, the port status in the port_n_err_stat_csr is not
valid. If the PLLs are being reset, the port is always initialized, even if the Port_OK is read from
port_n_err_stat_csr.
CPS Port Operation Registers
–
These registers control how ports retransmit new packets and allows limits placed on the number
of packets the are retransmitted upon CRC fail among others.
By programming the above three register sets, one can accomplish a full configuration of the physical layer
of all CPS ports. This is key to configuring the device to interface properly to adjacent devices in the system
prior to any sRIO bring-up and initialization routines take place.
Anytime a quad is configured or reconfigured, the user must also reinitialize the link by writing to the
FORCE_REINIT field in the QUAD_CTRL register. See the “Registers” chapter for more detail.
8.3.7 sRIO Bring-Up and Initialization
The next task in configuring the CPS is going into the sRIO bring-up and initialization routines (refer to the
RapidIO Software/System Bring Up specification).
8.4 EXAMPLE OF PROGRAMMING
There are only three steps to program the CPS switch route.
1. Program the QUAD_CTRL_Register (0xFF0000 - 0xFF3000).
Quad Mode (bit 5): Standard or Enhance
Quad Speed (bit 1-0): 3.125, 2.5 or 1.25 Gbps.
Transmitter Pre- emphasis (bit 4-2), Drive Strength (bit 9-7)
2. Program the Routing table (0xE00000 - 0xE00400 Global Device Route Table).
Register 0xE00000 is for Destination ID 0x00. The value in the register is the port number. For
example, Destination ID 0x00 connected to Port 8, then write 0x8 into register 0xE00000. If destina-
tion ID 0x01 is multicast ID, then write 0x40 into register 0xE00004. It will call the
multicast_register_0 when Dest_ID is matched. See
8.2.9 Destination Address to
Route Table Mapping
for more detail.
3. Enable the input and output port. (0x15C - 0x33C).
To force an standard Quad to 1x mode, use RIO CSRs Port_CTRL register (0x15C), bit 24-26
(PORT_WIDTH_OVERRIDE). Don’t use Quad Control Register, PLL_Reset bit.
All input and output port are disabled by default. It will only receive maintenance packet only.
Therefor, the input and output port need to be enabled before sending traffic.
